EM78P257AP datasheet(14/91 Pages) EMC

14 / 91 page

EM78P257

OTP ROM

This specification is subject to change without prior notice.

07.27.2004 (V1.4)

• Bit6 (IOCS) Select the Segment of the control register.

0 = Segment 0( IOC50~IOCF0 ) selected;

1 = Segment 1( IOC51~IOCC1 ) selected;

• Bit5 (PS0) Page select bits. PS0 is used to select a program memory page. When executing a "JMP",

"CALL", or other instructions that causes the program counter to change (e.g. MOV R2,A), PS0 is

loaded into the 11th bit of the program counter, selecting one of the available program memory

pages. Note that RET (RETL, RETI) instruction does not change the PS0 bits. That is, the return will

always be back to the page from where the subroutine was called, regardless of the current PS0 bit

setting.

PS0

Program memory page [Address]

Page 0 [000-3FF]

Page 1 [400-7FF]

• Bit 4 (T) Time-out bit.

Set to 1 with the "SLEP" and "WDTC" command, or during power on and reset to 0 by WDT time-out.

• Bit 3 (P) Power down bit.

Set to 1 during power on or by a "WDTC" command and reset to 0 by a "SLEP" command.

• Bit 2 (Z) Zero flag.

Set to "1" if the result of an arithmetic or logic operation is zero.

• Bit 1 (DC) Auxiliary carry flag.

• Bit 0 (C) Carry flag.

5. R4 (RAM Select Register)

•The Bit7 set to “0” as all time.

• Bit 6 is used to select bank 0 or bank 1.

• Bits 5~0 are used to select a register (address: 00~0F, 10~3F) in the indirect addressing mode.

• See the configuration of the data memory in Fig. 5.

6. R5 ~ R6 (Port 5 ~ Port 6)

• R5 and R6 are I/O registers.

• Only the lower 6 bits of R5 are available.(applicable to EM78P257A)

• The upper 2 bits of R5 are fixed to 0. (if EM78P257A is selected)

7. R7 (Port 7 )

I/O

• R7 is I/O registers.

• Only the lower 2 bits of R7 are available.

EM78P257AP Datasheet(PDF) 14 Page - ELAN Microelectronics Corp