LTC2992 datasheet(13/46 Pages) LINER

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LTC2992

Rev A

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calculated LSB (see Design Example section) for current

and power of both supplies have to match. Otherwise,

external µP can be used to first compute physical amount

of current and power for each supply and then perform

the summing.

The LTC2992 measures the current sense amplifier’s

input offset to calibrate subsequent IADC measurements.

During offset measurement, IADC cannot capture load

current information. By default, such calibration is done

for every IADC conversion as shown in Figure 2a. In most

applications, the calibration frequency can be reduced by

writing to CTRLA register with its CTRLA[7] bit set to 1.

A one-off calibration is then performed immediately after

the I2C write operation as shown in Figure 2b.

VADC by default monitors six input voltages sequentially

as shown in Figure 2a with an update rate of 10Hz for each

APPLICATIONS INFORMATION

input. Therefore, input signals such as supply rail voltages

with average value that varies at less than 5Hz can be ac-

curately monitored. Otherwise, the input update rate can

be increased by reducing the number of inputs monitored

via CTRLA[4:3]. Figure 2c shows only the SENSE+ pins

being monitored in continuous scan mode with an effec-

tive update rate of 30Hz. The remaining inputs may be

monitored by switching to snapshot mode when needed.

A snapshot mode is available to make on-demand mea-

surement of a single selected voltage without power data

update (SENSE1+, SENSE2+, GPIO1, GPIO2, GPIO3 or

GPIO4) or two selected voltages (either SENSE1+ and

SENSE2+,orGPIO1andGPIO2).Tomakeasnapshotmea-

surement, write the 3-bit code of the desired voltage input

to CTRLA[2:0] and 01 to CTRLA[6:5]. After completion of

the conversion, the ADCs will halt and the corresponding

Table 1. ADC Configuration Via CTRLA Register

BIT

NAME

OPERATION

CTRLA[7]

Offset Calibration

Offset Calibration for Current Measurements

[1] = Calibrate on Demand

[0] = Every Conversion (Default)

CTRLA[6:5]

Measurement

Mode

[11] = Shutdown

[10] = Single Cycle mode

The VADC converts SENSE1+, SENSE2+, GPIO1, GPIO2, GPIO3, GPIO4 once and stops. The IADCs stop after

one conversion.

P1 = SENSE1+ × ∆SENSE1; P2 = SENSE2+ × ∆SENSE2

[01] = Snapshot Mode

Snapshot Initializes Conversion on All 3 ADCs Simultaneously.

VADC Converts the Channel(s) per CTRLA[2:0]

[00] = Continuous Scan Mode (Default)

The Selected Channels for VADC are Defined by CTRLA[4:3]

CTRLA[4:3]

Voltage Selection

for Continuous

Scan Mode

CTRLA[4:3]

VADC

GPIO1, GPIO2,

GPIO3, GPIO4

GPIO1 × ∆SENSE1

GPIO2 × ∆SENSE2

GPIO1, GPIO2

GPIO1 × ∆SENSE1

GPIO2 × ∆SENSE2

SENSE1+, SENSE2+

SENSE1+ × ∆SENSE1

SENSE2+ × ∆SENSE2

00 (Default)

SENSE1+, SENSE2+,

GPIO1, GPIO2,

GPIO3, GPIO4

SENSE1+ × ∆SENSE1

SENSE2+ × ∆SENSE2

CTRLA[2:0]

Voltage Selection

for Snapshot

Mode

CTRLA[2:0]

VADC

111

GPIO1, GPIO2

GPIO1 × ∆SENSE1

GPIO2 × ∆SENSE2

110

SENSE1+, SENSE2+

SENSE1+ × ∆SENSE1

SENSE2+ × ∆SENSE2

101

GPIO4

∆SENSE1/2 without P1/P2 updates

100

GPIO3

011

GPIO2

010

GPIO1

001

SENSE2+

000 (Default)

SENSE1+

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