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LTC2992 Datasheet(PDF) 5 Page - Linear Technology |
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LTC2992 Datasheet(HTML) 5 Page - Linear Technology |
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5 / 46 page ![]() LTC2992 5 Rev A For more information www.analog.com Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All currents into pins are positive. All voltages are referenced to ground, unless otherwise noted. Note 3: An internal shunt regulator limits the INTVCC pin to a minimum of 5.8V. Driving this pin to voltages beyond 5.8V may damage the part. This pin can be safely tied to higher voltages through a resistor that limits the current below 35mA. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOD(OL) SDAO, SDAO, Output Low Voltage ISDAO, ISDAO = 8mA l 0.15 0.4 V ISDA,SCL(IN) SDAI, SDAO, SDAO, SCL Leakage Current SDAI, SDAO, SDAO, SCL = 5V l 0 ±1 A VSDA,SCL(TH) SDAI, SCL Input Threshold l 1.5 1.8 2.1 V VSDA,SCL(CL) SDAI, SCL Clamp Voltage ISDAI, ISCL = 0.5mA, 5mA l 5.9 6.9 V I2C Interface Timing fSCL(MAX) Maximum SCL Clock Frequency l 400 kHz tLOW SCL Low Period l 0.65 1.3 s tHIGH SCL High Period l 50 600 ns tBUF(MIN) Bus Free Time Between STOP/START Condition l 0.12 1.3 s tHD, STA(MIN) Hold Time after (Repeated) START Condition l 140 600 ns tSU, STA(MIN) Repeated START Condition Setup Time l 30 600 ns tSU, STO(MIN) STOP Condition Setup Time l 30 600 ns tHD, DATI(MIN) Data Hold Time Input l −100 0 ns tHD, DATO(MIN) Data Hold Time Output l 300 600 900 ns tSU, DAT(MIN) Data Setup Time l 30 100 ns tSP(MAX) Maximum Suppressed Spike Pulse Width l 50 110 250 ns tRST Stuck Bus Reset Time SCL or SDAI Held Low l 25 33 ms CX SCL, SDAI Input Capacitance (Note 5) 5 10 pF Note 4: Internal clamps limit the SCL and SDAI pins to a minimum of 5.9V. Driving these pins to voltages beyond the clamp may damage the part. The pins can be safely tied to higher voltages through resistors that limit the current below 5mA. Note 5: Guaranteed by design and not subjected to test. Note 6: ∆SENSE is defined as VSENSE+ – VSENSE– Note 7: TUE is the maximum ADC error for any code expressed as a percentage of full-scale. ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C. VDD is from 3V to 100V unless otherwise noted. (Note 2) |
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