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LTC3265 Datasheet(PDF) 8 Page - Linear Technology |
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LTC3265 Datasheet(HTML) 8 Page - Linear Technology |
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8 / 20 page ![]() LTC3265 8 3265fa For more information www.linear.com/LTC3265 PIN FUNCTIONS (DFN/TSSOP) CBST– (Pin 1/Pin 2): Boost Charge Pump Flying Capacitor Negative Connection. NC (Pins 1, 11 TSSOP Only): No Connect. These pins are not connected to LTC3265 die. These pins should be left floating or connected to ground. CBST+ (Pin 2/Pin 3): Boost Charge Pump Flying Capacitor Positive Connection. VIN_P (Pin 3/Pin 4): Input Voltage for Boost Charge Pump. VIN_P should be bypassed with a low impedance ceramic capacitor. EN– (Pin 4/Pin 5): Logic Input. A logic “high” on the EN– pin enables the inverting charge pump as well as the negative LDO regulator. Do not float this pin. BYP– (Pin 5/Pin 6): LDO– Reference Bypass Pin. Connect a capacitor from BYP– to GND to reduce LDO– output noise. Leave floating if unused. ADJ– (Pin 6/Pin 7): Feedback Input for the Negative Low Dropout Regulator. This pin servos to a fixed voltage of –1.2V when the control loop is complete. LDO– (Pin 7/Pin 8): Negative Low Dropout (LDO–) Linear Regulator Output. This pin requires a low ESR (equivalent series resistance) capacitor with at least 2µF capacitance to ground for stability. VOUT–(Pin8/Pin9):InvertingChargePumpOutputVoltage. Inconstantfrequencymode(MODE=low)thispinisdriven to –VIN_N. In Burst Mode operation, (MODE = high) this pin voltage is regulated to – 0.9 • VIN_N using an internal burst comparator with hysteretic control. CINV– (Pin 9/Pin 10): Inverting Charge Pump Flying Capacitor Positive Connection. CINV+ (Pin 10/Pin 12): Inverting Charge Pump Flying Capacitor Negative Connection. VIN_N (Pin 11/Pin 13): Input Voltage for Inverting Charge Pump. This pin should be tied to VIN_P or VOUT+ pins depending on the desired output voltage at the VOUT– pin. If VIN_N is tied to VOUT+, the output at VOUT– will be –VOUT+ or –2 • VIN_P. This configuration is suitable for symmetric outputs at LDO+ and LDO– pins. If VIN_N is tied to VIN_P, the output at VOUT– will be –VIN_P. This configuration is suitableforasymmetricoutputsatLDO+andLDO–pins.See ApplicationsInformationforadditionaldetails.VIN_Nshould be bypassed with a low impedance ceramic capacitor. RT (Pin 12/Pin 14): Input Connection for Programming the Switching Frequency. The RT pin servos to a fixed 1.2V when the EN+ or EN– pin is driven to a logic “high”. A resistor from RT to GND sets the charge pump switch- ing frequency. If the RT pin is tied to GND, the switching frequency defaults to a fixed 500kHz. EN+ (Pin 13/Pin 15): Logic Input. A logic “high” on the EN+ pin enables the boost charge pump as well as the positive LDO regulator. Do not float this pin. MODE (Pin 14/Pin 16): Logic Input. The MODE pin determinesthechargepumpoperatingmode.Alogic“high” on the MODE pin forces the charge pumps to operate in Burst Mode operation. The boost charge pump regulates the VOUT+ pin to 0.94 • 2 • VIN_P with hysteretic control. The inverting charge pump regulates the VOUT– pin to (–0.94 • VIN_N). A logic “low” on the MODE pin forces the charge pumps to operate in open-loop mode with a constant switching frequency. The boost charge pump doubles the input to 2 • VIN_P in this mode while the inverting charge pump inverts its input to (–VIN_N). The switching frequency in both modes is determined by an external resistor from the RT pin to GND. In Burst Mode operation,thisrepresentsthefrequencyoftheburstcycles beforethepartentersthelowquiescentcurrentsleepstate. Do not float this pin. |
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