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LTC3265 Datasheet(PDF) 9 Page - Linear Technology |
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LTC3265 Datasheet(HTML) 9 Page - Linear Technology |
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9 / 20 page ![]() LTC3265 9 3265fa For more information www.linear.com/LTC3265 PIN FUNCTIONS (DFN/TSSOP) BYP+ (Pin 15/Pin 17): LDO+ Reference Bypass Pin. Con- nect a capacitor from BYP+ to GND to reduce LDO+ output noise. Leave floating if unused. ADJ+ (Pin 16/Pin 18): Feedback Input for the Positive Low Dropout (LDO+) Regulator. This pin servos to a fixed voltage of 1.2V when the control loop is complete. LDO+(Pin17/Pin19):PositiveLowDropout(LDO+)Output. This pin requires a low ESR capacitor with at least 2µF capacitance to ground for stability. VOUT+(Pin18/Pin20):BoostChargePumpOutputVoltage. Inconstantfrequencymode(MODE=low)thispinisdriven to 2 • VIN_P. In Burst Mode operation, (MODE = high) this pin voltage is regulated to 0.94 • 2 • VIN_P using an internal burst comparator with hysteretic control. GND (Exposed Pad Pin 19/Exposed Pad Pin 21): Ground. The exposed package pad is ground and must be soldered to the PC board ground plane for proper functionality and for rated thermal performance. |
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