LTC3118 datasheet(22/40 Pages) LINER

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LTC3118

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operaTion

Manual VIN Select Circuits

The SEL pin can be used to manually switch between VIN1

and VIN2, if VIN2 is connected to a voltage greater than

VIN1. In this case, both RUN pins must remain asserted

above their 1.22V thresholds. The LTC3118 will run off

VIN1 when SEL is low and the higher VIN2 source when

SEL is high.

For systems requiring manual VIN selection where the

relative voltages are unknown, the RUN pins can be used

with a few precautions. Each RUN pin contains internal

filtering to reduce the chance of unintended turn-on or

turn-off due to noise events. The turn-on delay is typically

50µs in order to manage inductive ringing during supply

plug in. Accordingly, a >100µs overlap time of asserted

RUN1 and RUN2 signals is recommended to prevent a

momentary shutdown of the IC and a subsequent soft-

start cycle.

If this overlap timing cannot be provided by the system

micro-controller, an external circuit similar to Figure 4b

can be added to each RUN pin. With the added circuit, VIN1

and VIN2 can be driven alternately off and on as shown.

The diode provides a faster turn-on path, where the RC

delay to GND is set to ~100µs in order to prevent VOUT

from drooping during switch-over.

Active VIN Indicator

The V1GD and V2GD indicators can be monitored to

determine if VIN1 or VIN2 have sufficient voltage based on

internal UVLO circuits and the RUN pin divider networks

as previously discussed. Some applications may require

an additional indication of which VIN is active and which

is inactive. This indication can be implemented with the

CN1 and CN2 charge-pump pins and an external circuit

similar to Figure 4c. The diode and RC network provide

peak detection and filtering of the active CN pin which is

switching in PWM mode and held high in sleep. The CN

pin for the inactive VIN is held low.

Thermal Considerations

The power switches of the LTC3118 are designed to oper-

ate continuously with currents up to the internal current

limit thresholds. However, when operating at high current

levels, there may be significant heat generated within the

IC. In addition, the VCC regulator can generate a significant

amount of heat when the active VINishigh.Thisaddstothe

total power dissipation of the IC. As described elsewhere

in this data sheet, bootstrapping of VCC for 5V output ap-

plications can essentially eliminate this power dissipation

term and significantly improve efficiency.

Careful consideration must be given to the thermal envi-

ronment of the IC in order to provide a means to remove

heat from the IC and ensure that the LTC3118 is able

to provide its full rated output current. Specifically, the

exposed die attach pad of both the QFN and FE packages

must be soldered to a copper layer on the PCB to maximize

the conduction of heat out of the IC package. This can be

accomplished by utilizing multiple vias from the die attach

pad connection underneath the IC package to other PCB

layer(s) containing large copper planes. A recommended

board layout incorporating these concepts is shown in

Figure 5. Typical temperature rise versus load current

curves using the PCB in Figure 5 are given in the Typical

Performance Characteristics section.

If the IC die temperature exceeds approximately 165°C,

thermal shutdown will be invoked and all switching will

be inhibited. The part will remain disabled until the die

temperature cools by approximately 10°C, at which time

a soft-start is initiated to provide a smooth recovery.

applicaTions inForMaTion

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