LTC3370 datasheet(15/24 Pages) LINER

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LTC3370

3370fb

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operaTion

Table 1. Master Slave Program Combinations (Each Letter

Corresponds to a VIN and SW Pair)

PROGRAM

CODE

C3C2C1

BUCK 1

BUCK 2

BUCK 3

BUCK 4

000

001

ABC

010

ABC

FGH

011

ABCH

100

ABC

Not Used

FGH

101

ABCD

Not Used

110

ABCD

Not Used

FGH

111

ABCD

Not Used

EFGH

Power Failure Reporting Via PGOODALL Pin

Power failure conditions are reported back by the

PGOODALL pin. Each buck switching regulator has an

internal power good (PGOOD) signal. When the regulated

output voltage of an enabled switcher falls below 98% for

Buck regulator 1 or 95% for Buck regulators 2-4 of its

programmed value, the PGOOD signal is pulled low. If any

PGOOD signal stays low for greater than 100µs, then the

PGOODALLpinispulledlow,indicatingtoamicroprocessor

thatapowerfailurefaulthasoccurred.The100µsfiltertime

prevents the pin from being pulled low due to a transient.

The PGOOD signal has a 0.3% hysteresis such that when

the regulated output voltage of an enabled switcher rises

above 98.3% or 95.3%, respectively, of its programmed

value, the PGOOD signal transitions high.

Temperature Monitoring and Overtemperature

Protection

To prevent thermal damage to the LTC3370 and its sur-

rounding components, the LTC3370 incorporates an

overtemperature (OT) function. When the LTC3370 die

temperature reaches 170°C (typical) all enabled buck

switchingregulatorsareshutdownandremaininshutdown

until the die temperature falls to 160°C (typical).

Thetemperaturemaybereadbackbytheuserbysampling

theTEMPpinanalogvoltage.Thetemperature,T,indicated

by the TEMP pin voltage is given by:

T =

VTEMP – 45mV

7mV

•1°C

(1)

If none of the buck switching regulators are enabled, then

the temperature monitor is also shut down to further

reduce quiescent current.

Programming the Operating Frequency

Selection of the operating frequency is a trade-off between

efficiency and component size. High frequency operation

allows the use of smaller inductor and capacitor values.

Operation at lower frequencies improves efficiency by

reducing internal gate charge losses but requires larger

inductance values and/or capacitance to maintain low

output voltage ripple.

The operating frequency for all of the LTC3370 regulators

is determined by an external resistor that is connected

between the RT pin and ground. The operating frequency

can be calculated using the following equation:

fOSC =

8 •1011•ΩHz

(2)

While the LTC3370 is designed to function with operat-

ing frequencies between 1MHz and 3MHz, it has safety

clamps that will prevent the oscillator from running faster

than 4MHz (typical) or slower than 250kHz (typical). Tying

the RT pin to VCC sets the oscillator to the default internal

operating frequency of 2MHz (typical).

The LTC3370’s internal oscillator can be synchronized

through an internal PLL circuit to an external frequency

by applying a square wave clock signal to the PLL/MODE

pin. During synchronization, the top MOSFET turn-on of

Buck regulator 1 is phase locked to the rising edge of

the external frequency source. All other buck switching

regulators are locked to the appropriate phase of the ex-

ternal frequency source (see Buck Switching Regulators).

The synchronization frequency range is 1MHz to 3MHz.

A synchronization signal on the PLL/MODE pin will force

all active buck switching regulators to operate in forced

continuous mode PWM.

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