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LTM4645 Datasheet(PDF) 16 Page - Linear Technology

Part # LTM4645
Description  Dual 10A or Single 20A 關Module Regulator
PDF  34 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTM4645 Datasheet(HTML) 16 Page - Linear Technology

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LTM4646
16
4646f
For more information www.linear.com/LTM4646
APPLICATIONS INFORMATION
Frequency Selection and Phase-Locked Loop(MODE_
PLLIN and fSET Pins)
The LTM4646 device is operated over a range of frequen-
cies to improve power conversion efficiency . It is recom-
mended to operate the lower output voltages or lower
duty cycle conversions at lower frequencies to improve
efficiency by lowering power MOSFET switching losses.
Higher output voltages or higher duty cycle conversions
can be operated at higher frequencies to limit inductor
ripple current. The efficiency graphs will show an operat-
ing frequency chosen for that condition An internal oscil-
lator (clock generator) provides phase interleaved internal
clock signals for individual channels to lock up to. The
switching frequency and phase of each switching channel
is independently controlled by adjusting the top MOSFET
turn-on time (on-time) through the one-shot timer. This
is achieved by sensing the phase relationship between
a top MOSFET turn-on signal and its internal reference
clock through a phase detector, and the time interval of the
one-shot timer is adjusted on a cycle-by-cycle basis, so
that the rising edge of the top MOSFET turn-on is always
trying to synchronize to the internal reference clock signal
for the respective channel.
The frequency of the internal oscillator can be pro-
grammed from 250kHz to 1.3MHz by connecting a resis-
tor, RT , from the FREQ pin to signal ground (SGND). The
FREQ pin is regulated to 1.2V internally. The value of this
resistor can be chosen according to the formula:
RT(kΩ) =
41550
f(kHz)
– 2.2
For applications with stringent frequency or interfer-
ence requirements, an external clock source connected
to the MODE_PLLIN pin can be used to synchronize the
internal clock signals through a clock phase-locked loop
(Clock PLL). The LTM4646 operates in forced continuous
mode of operation when it is synchronized to the exter-
nal clock. The external clock frequency has to be within
±30% of the internal oscillator frequency for successful
synchronization.
The clock input levels should be no less than 2V for “high”
and no greater than 0.5V for “low”. The MODE_PLLIN pin
has an internal 600k pull-down resistor.
During dynamic transient conditions either in the line volt-
age or load current (e.g., load step or release), the top
switch will turn on more or less frequently in response
to achieve faster transient response. This is the benefit of
the LTM4646’s controlled on-time, valley current mode
architecture. However, this process may understandably
lose phase and even frequency lock momentarily. For
relatively slow changes, phase and frequency lock can
still be maintained. For large load current steps with fast
slew rates, phase lock will be lost until the system returns
back to a steady-state condition . It may take up to several
hundred microseconds to fully resume the phase lock, but
the frequency lock generally recovers quickly, long before
phase lock does.
Minimum On-Time and Minimum Off-Time
Minimum on-time tON is the smallest time duration that
the LTM4646 is capable of turning on the top MOSFET on
either channel. It is determined by internal timing delays,
and the gate charge required to turn on the top MOSFET.
The LTM4646 has a minimum on time of ~30ns, and far
lower than what would be a concern based on the maxi-
mum operating frequency of 1.3MHz .
The below equation can be checked against the VIN , VOUT,
and (FREQ) frequency of operation to insure the minimum
on time tON(MIN) is above 30ns.
VOUT
VIN • FREQ
tON(MIN)
If the duty cycle falls below what can be accommodated
by the minimum on-time, the controller will begin to skip
cycles. The output voltage will continue to be regulated,
but the output ripple will increase. The on-time can be
increased by lowering the switching frequency. The
below equation can be checked against the VIN , VOUT,
and (FREQ) frequency of operation to insure the minimum
off time tOFF(MIN) is above 90ns.
VOUT(MAX)
VIN(MAX)
DMAX
DMAX 1 – FREQ • tOFF(MIN)



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