LTM4613 datasheet(23/30 Pages) LINER

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LTM8003

8003fc

For more information www.linear.com/LTM8003

APPLICATIONS INFORMATION

number of thermal vias depends upon the printed

circuit board design. For example, a board might use

very small via holes. It should employ more thermal

vias than a board that uses larger holes.

Hot-Plugging Safely

The small size, robustness and low impedance of ceramic

capacitors make them an attractive option for the input

bypass capacitor of LTM8003. However, these capacitors

can cause problems if the LTM8003 is plugged into a live

supply (see Linear Technology Application Note 88 for a

complete discussion). The low loss ceramic capacitor

combined with stray inductance in series with the power

source forms an underdamped tank circuit, and the volt-

age at the VIN pin of the LTM8003 can ring to more than

twice the nominal input voltage, possibly exceeding the

LTM8003’sratinganddamagingthepart.Iftheinputsupply

is poorly controlled or the LTM8003 is hot-plugged into an

energized supply, the input network should be designed

to prevent this overshoot. This can be accomplished by

installing a small resistor in series to VIN, but the most

popular method of controlling input voltage overshoot is

add an electrolytic bulk cap to the VIN net. This capacitor’s

relativelyhighequivalentseriesresistancedampsthecircuit

and eliminates the voltage overshoot. The extra capacitor

improves low frequency ripple filtering and can slightly

improve the efficiency of the circuit, though it is likely to

be the largest component in the circuit.

Thermal Considerations

The LTM8003 output current may need to be derated if it

is required to operate in a high ambient temperature. The

amount of current derating is dependent upon the input

voltage, output power and ambient temperature. The

derating curves given in the Typical Performance Char-

acteristics section can be used as a guide. These curves

were generated by the LTM8003 mounted to a 58cm2

4-layer FR4 printed circuit board. Boards of other sizes

and layer count can exhibit different thermal behavior, so

it is incumbent upon the user to verify proper operation

over the intended system’s line, load and environmental

operating conditions.

For increased accuracy and fidelity to the actual applica-

tion, many designers use FEA (Finite Element Analysis)

to predict thermal performance. To that end, Page 2 of

the data sheet typically gives four thermal coefficients:

θJA – Thermal resistance from junction to ambient

θJCbottom – Thermal resistance from junction to the

bottom of the product case

θJCtop – Thermal resistance from junction to top of the

product case

θJB – Thermal resistance from junction to the printed

circuit board.

While the meaning of each of these coefficients may

seem to be intuitive, JEDEC has defined each to avoid

confusion and inconsistency. These definitions are given

in JESD51-12, and are quoted or paraphrased below:

θJA is the natural convection junction-to-ambient air

thermal resistance measured in a one cubic foot sealed

enclosure. This environment is sometimes referred to as

“still air” although natural convection causes the air to

move. This value is determined with the part mounted to

a JESD 51-9 defined test board, which does not reflect an

actual application or viable operating condition.

θJCbottom is the junction-to-board thermal resistance with

allofthecomponentpowerdissipationflowingthroughthe

bottom of the package. In the typical µModule regulator,

the bulk of the heat flows out the bottom of the package,

but there is always heat flow out into the ambient envi-

ronment. As a result, this thermal resistance value may

be useful for comparing packages but the test conditions

don’t generally match the user’s application.

LTM4613 Datasheet(PDF) 23 Page - Linear Technology

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