LT8705 datasheet(12/38 Pages) LINER

12 / 38 page

LTC3784

3784fb

For more information www.linear.com/LTC3784

When the controller is enabled for Burst Mode opera-

tion, the minimum peak current in the inductor is set to

approximately 30% of the maximum sense voltage even

though the voltage on the ITH pin indicates a lower value.

If the average inductor current is higher than the required

current, the error amplifier EA will decrease the voltage

on the ITH pin. When the ITH voltage drops below 0.425V,

the internal sleep signal goes high (enabling sleep mode)

and both external MOSFETs are turned off.

In sleep mode much of the internal circuitry is turned off

and the LTC3784 draws only 28μA of quiescent current.

In sleep mode the load current is supplied by the output

capacitor. As the output voltage decreases, the EA’s output

begins to rise. When the output voltage drops enough, the

sleep signal goes low and the controller resumes normal

operation by turning on the bottom external MOSFET on

the next cycle of the internal oscillator.

When the controller is enabled for Burst Mode operation,

the inductor current is not allowed to reverse. The reverse

current comparator (IREV) turns off the top external

MOSFET just before the inductor current reaches zero,

preventing it from reversing and going negative. Thus,

thecontrolleroperatesindiscontinuouscurrentoperation.

In forced continuous operation or when clocked by an

external clock source to use the phase-locked loop (see

the Frequency Selection and Phase-Locked Loop section),

the inductor current is allowed to reverse at light loads or

under large transient conditions. The peak inductor cur-

rent is determined by the voltage on the ITH pin, just as

in normal operation. In this mode, the efficiency at light

loads is lower than in Burst Mode operation. However,

continuous operation has the advantages of lower output

voltage ripple and less interference to audio circuitry, as

it maintains constant-frequency operation independent

of load current.

WhenthePLLIN/MODEpinisconnectedforpulse-skipping

mode,theLTC3784operatesinPWMpulse-skippingmode

at light loads. In this mode, constant-frequency operation

is maintained down to approximately 1% of designed

maximum output current. At very light loads, the current

comparator ICMP may remain tripped for several cycles

and force the external bottom MOSFET to stay off for

the same number of cycles (i.e., skipping pulses). The

inductor current is not allowed to reverse (discontinuous

operation). This mode, like forced continuous operation,

exhibits low output ripple as well as low audio noise and

reduced RF interference as compared to Burst Mode

operation. It provides higher low current efficiency than

forced continuous mode, but not nearly as high as Burst

Mode operation.

Frequency Selection and Phase-Locked Loop

(FREQ and PLLIN/MODE Pins)

Theselectionofswitchingfrequencyisatrade-offbetween

efficiency and component size. Low frequency opera-

tion increases efficiency by reducing MOSFET switching

losses, but requires larger inductance and/or capacitance

to maintain low output ripple voltage.

The switching frequency of the LTC3784’s controllers can

be selected using the FREQ pin.

If the PLLIN/MODE pin is not being driven by an external

clock source, the FREQ pin can be tied to SGND, tied to

INTVCC,orprogrammedthroughanexternalresistor.Tying

FREQ to SGND selects 350kHz while tying FREQ to INTVCC

selects535kHz.PlacingaresistorbetweenFREQandSGND

allows the frequency to be programmed between 50kHz

and 900kHz, as shown in Figure 7.

A phase-locked loop (PLL) is available on the LTC3784

to synchronize the internal oscillator to an external clock

source that is connected to the PLLIN/MODE pin. The

LTC3784’s phase detector adjusts the voltage (through

an internal lowpass filter) of the VCO input to align the

turn-on of the first controller’s external bottom MOSFET

to the rising edge of the synchronizing signal. Thus, the

turn-onofthesecondcontroller’sexternalbottomMOSFET

is 180 or 240 degrees out-of-phase to the rising edge of

theexternalclocksource.Whensynchronized,theLTC3784

will operate in forced continuous mode of operation if the

OVMODE pin is grounded. If the OVMODE pin is tied to

INTVCC, the LTC3784 will operate in pulse-skipping mode

of operation when synchronized.

The VCO input voltage is prebiased to the operating fre-

quency set by the FREQ pin before the external clock is

applied. If prebiased near the external clock frequency,

operaTion

LT8705 Datasheet(PDF) 12 Page - Linear Technology

LT8705 Datasheet(HTML) 12 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38

Datasheet Download

Link URL