ISL6527, ISL6527A

FN9056 Rev 11.00

Page 12 of 17

Sep 29, 2015

approximate response time interval for application and removal

of a transient load:

response time to the removal of load. The worst case response

time can be either at the application or removal of load. Be

sure to check both Equations 14 and 15 at the minimum and

maximum output levels for the worst case response time.

Input Capacitor Selection

Use a mix of input bypass capacitors to control the voltage

overshoot across the MOSFETs. Use small ceramic capacitors

for high frequency decoupling and bulk capacitors to supply the

capacitors physically close to the MOSFETs and between the

The important parameters for the bulk input capacitor are the

voltage rating and the RMS current rating. For reliable operation,

select the bulk capacitor with voltage and current ratings above

the maximum input voltage and largest RMS current required by

the circuit. The capacitor voltage rating should be at least 1.25x

greater than the maximum input voltage and a voltage rating of

1.5x is a conservative guideline. The RMS current rating

requirement for the input capacitor of a buck regulator is

approximately 1/2 the DC load current.

The maximum RMS current required by the regulator may be

closely approximated through Equation 16:

For a through-hole design, several electrolytic capacitors may be

needed. For surface mount designs, solid tantalum capacitors can

be used, but caution must be exercised with regard to the

capacitor surge current rating. These capacitors must be capable

of handling the surge-current at power-up. Some capacitor series

available from reputable manufacturers are surge current tested.

MOSFET Selection/Considerations

The ISL6527, ISL6527A require two N-Channel power

supply requirements, and thermal management requirements.

In high-current applications, the MOSFET power dissipation,

package selection and heatsink are the dominant design factors.

The power dissipation includes two loss components;

conduction loss and switching loss. The conduction losses are

the largest component of power dissipation for both the upper

and the lower MOSFETs. These losses are distributed between

the two MOSFETs according to duty factor. The switching losses

seen when sourcing current will be different from the switching

losses seen when sinking current. When sourcing current, the

upper MOSFET realizes most of the switching losses. The lower

switch realizes most of the switching losses when the converter

is sinking current (see Equations 17 and 18). These equations

assume linear voltage-current transitions and do not adequately

model power loss due the reverse-recovery of the upper and

lower MOSFET’s body diode. The gate-charge losses are

dissipated by the ISL6527, ISL6527A and don't heat the

MOSFETs. However, large gate-charge increases the switching

Ensure that both MOSFETs are within their maximum junction

temperature at high ambient temperature by calculating the

temperature rise according to package thermal-resistance

specifications. A separate heatsink may be necessary

depending upon MOSFET power, package type, ambient

temperature and air flow.

Given the reduced available gate bias voltage (5V), logic-level or

sub-logic-level transistors should be used for both N-MOSFETs.

Caution should be exercised with devices exhibiting very low

aboard the ISL6527, ISL6527A may be circumvented by these

MOSFETs if they have large parasitic impedances and/or

capacitances that would inhibit the gate of the MOSFET from

being discharged below its threshold level before the

complementary MOSFET is turned on.

Bootstrap Component Selection

External bootstrap components, a diode and capacitor, are

required to provide sufficient gate enhancement to the upper

MOSFET. The internal MOSFET gate driver is supplied by the

external bootstrap circuitry as shown in Figure 7. The boot

to the PHASE pin. This supply is refreshed each cycle, when

Just after the PWM switching cycle begins and the charge

transfer from the bootstrap capacitor to the gate capacitance is

complete, the voltage on the bootstrap capacitor is at its lowest

point during the switching cycle. The charge lost on the

bootstrap capacitor will be equal to the charge transferred to

(EQ. 14)

(EQ. 15)

MAX

----------------

MAX

2

1

12

------

–



--------------------------------

----------------









+









=

(EQ. 16)

Losses while Sourcing current

Io

2





D



1

2

--- Io









+

=

(EQ. 17)

Losses while Sinking current

Io

2





1D

–





1

2

--- Io









+

=

(EQ. 18)