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FNP3000 Datasheet(PDF) 6 Page - Bel Fuse Inc.

Part # FNP3000
Description  AC-DC FRONT-END POWER SUPPLY
PDF  17 Pages
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Manufacturer  BEL [Bel Fuse Inc.]
Direct Link  http://www.belfuse.com
Logo BEL - Bel Fuse Inc.

FNP3000 Datasheet(HTML) 6 Page - Bel Fuse Inc.

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FNP3000 Series
tech.support@psbel.com
signal pin
column
“2”
A2
DC_OK_L
“L” to indicate DC output is within regulation,
there is no internal pull up resistor and it should
be provided externally to support VCEO
≤ 20 VDC,
Ic
≤ 5 mA DC
>2.1 V
<0.4 V
-5 mA
B2
AC_OK_L
“L” to indicate AC above lower limit that is required
for sustain normal operation, there is no internal
pull up resistor and it should be provided externally
to support VCEO
≤ 20 VDC, Ic ≤ 5 mA DC
>2.1 V
<0.4 V
-5 mA
C2
PS_PRESENT_L
detects presence of power supply, “low” when
inserted, host system to provide pull up resistor
capable of sourcing 5 mA
>2.1 V
<0.4 V
-5 mA
D2
Vstandby (+VE)
V2 (+VE) output terminal
signal pin
column
“3”
A3
I2C/SMbus clock
external 3.32 k
Ω pull-up needed to 3.3 V
-3 mA
B3
I2C/SMbus data
external 3.32 k
Ω pull-up needed to 3.3 V
-3 mA
C3
SMBALERT
communications (SMBus) alert
>2.1 V
<0.4 V
-5 mA
D3
Vstandby (-VE)
V2 (-VE) output terminal
signal pin
column
“4”
A4
n/a
reserved
B4
n/a
reserved
C4
OTP_OK_L
temperature “OK” signal
>2.1 V
<0.4 V
-5 mA
D4
n/a
reserved
signal pin
column
“5”
A5
Spare/Vpgm
analog VPGM signal
B5
n/a
reserved
C5
n/a
reserved
D5
n/a
reserved
signal pin
column
“6”
A6
V1 -VE sense
V1 negative sense connection
B6
Ishare
V1 current share option
C6
n/a
reserved
D6
V1 +VE sense
V1 positive sense connection
The default method of digital communication shall utilize I2C hardware capable of operation at a minimum of 100 kHz clock (SCL)
frequency. A mandatory feature of this module is that should either the module be disconnected from the incoming AC source
(inserted in to a slot in an unpowered state); the module input fuse(s) fail; or the internal auxiliary supply (which derives the VCC of
the I2C equipped device) fail, then any line associated with the I2C bus (SCL; SDA) should be disconnected (effectively tri-stated)
from the I2C bus to prevent erroneous operation that may result from this unpowered condition. All I2C lines shall be “clean” and
free from excessive spikes and common mode noise and comply with the requirements of the generic standard which defines I2C
logic levels.
The I2C hardware should conform to the requirements of the NXP (formerly Philips Semiconductor) Standard: UM10204 I2C Bus
Specification and User Manual; Rev 0.3; 19 June 2007.
The rectifier shall be capable of processing commands to monitor & control the rectifier via the digital bus by use of the following
protocols:
•
CUI’s “standard” protocol – this shall be considered the “default” that shall be offered as a standard.
•
The PMBus® (Power Management Bus) Protocol – this shall be considered the “optional” offering.



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