ISL6565BCB datasheet(23/28 Pages) RENESAS

23 / 28 page

ISL6565A, ISL6565B

FN9135 Rev 4.00

Page 23 of 28

Dec 1, 2005

Since the system poles and zero are affected by the values

of the components that are meant to compensate them, the

solution to the system equation becomes fairly complicated.

Fortunately, there is a simple approximation that comes very

close to an optimal solution. Treating the system as though it

were a voltage-mode regulator, by compensating the L-C

poles and the ESR zero of the voltage-mode approximation,

yields a solution that is always stable with very close to ideal

transient performance.

Select a target bandwidth for the compensated system, f0.

The target bandwidth must be large enough to assure

adequate transient performance, but smaller than 1/3 of the

per-channel switching frequency. The values of the

compensation components depend on the relationships of f0

to the L-C pole frequency and the ESR zero frequency. For

each of the following three, there is a separate set of

equations for the compensation components.

In Equation 40, L is the per-channel filter inductance divided

by the number of active channels; C is the sum total of all

output capacitors; ESR is the equivalent-series resistance of

the bulk output-filter capacitance; and VPP is the peak-to-

peak sawtooth signal amplitude as described in Figure 6 and

Electrical Specifications

Once selected, the compensation values in Equation 40

assure a stable converter with reasonable transient

performance. In most cases, transient performance can be

improved by making adjustments to RC. Slowly increase the

value of RC while observing the transient performance on an

oscilloscope until no further improvement is noted. Normally,

CC will not need adjustment. Keep the value of CC from

Equation 40 unless some performance issue is noted.

The optional capacitor C2, is sometimes needed to bypass

noise away from the PWM comparator (see Figure 17). Keep

a position available for C2, and be prepared to install a high-

frequency capacitor of between 22pF and 150pF in case any

leading-edge jitter problem is noted.

Output Filter Design

The output inductors and the output capacitor bank together

to form a low-pass filter responsible for smoothing the

pulsating voltage at the phase nodes. The output filter also

must provide the transient energy until the regulator can

respond. Because it has a low bandwidth compared to the

switching frequency, the output filter limits the system

transient response. The output capacitors must supply or

sink load current while the current in the output inductors

increases or decreases to meet the demand.

In high-speed converters, the output capacitor bank is usually

the most costly (and often the largest) part of the circuit.

Output filter design begins with minimizing the cost of this part

of the circuit. The critical load parameters in choosing the

output capacitors are the maximum size of the load step,

I,

the load-current slew rate, di/dt, and the maximum allowable

output-voltage deviation under transient loading,

VMAX.

Capacitors are characterized according to their capacitance,

ESR, and ESL (equivalent series inductance).

At the beginning of the load transient, the output capacitors

supply all of the transient current. The output voltage will

initially deviate by an amount approximated by the voltage

drop across the ESL. As the load current increases, the

voltage drop across the ESR increases linearly until the load

current reaches its final value. The capacitors selected must

FIGURE 17. COMPENSATION CONFIGURATION FOR

LOAD-LINE REGULATED ISL6565A, ISL6565B

CIRCUIT

COMP

RFB

VDIFF

VDROOP

C2 (OPTIONAL)

 LC

------------------- f0

RFB

f

0Vpp LC

0.75VIN

------------------------------------

0.75VIN

V

PPRFBf0

------------------------------------

Case 1:

 LC

------------------- f0

C ESR



------------------------------



RFB

VPP 2

2 f

2 LC

0.75 VIN

--------------------------------------------

0.75VIN



2 f

2 V

PPRFB LC

-------------------------------------------------------------

Case 2:

(EQ. 40)

C ESR



------------------------------

RFB

 f

0VppL

0.75 VIN ESR



------------------------------------------

0.75VIN ESR

 C

V

PPRFBf0 L

-------------------------------------------------

Case 3:

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