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DLPC3479 Datasheet(PDF) 26 Page - Texas Instruments |
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DLPC3479 Datasheet(HTML) 26 Page - Texas Instruments |
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26 / 61 page ![]() PCLK tp_su tp_h tp_wh tp_wl tp_clkper VSYNC_WE HSYNC_CS DATAEN_CMD tp_vsw 1 Frame tp_vbp tp_vfp HSYNC_CS DATAEN_CMD tp_hsw 1 Line tp_hfp tp_hbp PDATA(23/15:0) P0 PCLK P1 P2 P3 P n-2 P n-1 Pn (This diagram assumes the VSYNC active edge is the rising edge) (This diagram assumes the HSYNC active edge is the rising edge) 26 DLPC3479 DLPS112 – JUNE 2018 www.ti.com Product Folder Links: DLPC3479 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Figure 7. Parallel Interface Frame Timing Figure 8. Parallel Interface General Timing |
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