X9521 datasheet(5/24 Pages) RENESAS

5 / 24 page

X9521

FN8207 Rev 2.00

Page 5 of 24

September 21, 2010

Nonvolatile Write Acknowledge Polling

After a nonvolatile write command sequence (for either the

EEPROM array, the Non Volatile Memory of a DCP (NVM),

or the CONSTAT Register) has been correctly issued

(including the final STOP condition), the X9521 initiates an

internal high voltage write cycle. This cycle typically

requires 5 ms. During this time, no further Read or Write

commands can be issued to the device. Write Acknowl-

edge Polling is used to determine when this high voltage

write cycle has been completed.

To perform acknowledge polling, the master issues a

START condition followed by a Slave Address Byte. The

Slave Address issued must contain a valid Internal Device

Address. The LSB of the Slave Address (R/W) can be set

to either 1 or 0 in this case. If the device is still busy with the

high voltage cycle then no ACKNOWLEDGE will be

returned. If the device has completed the write operation,

an ACKNOWLEDGE will be returned and the host can

then proceed with a read or write operation. (Refer to Fig-

ure 5.).

DIGITALLY CONTROLLED POTENTIOMETERS

DCP Functionality

The X9521 includes two independent resistor arrays.

These arrays respectively contain 99 and 255 discrete

resistive segments that are connected in series. The

physical ends of each array are equivalent to the fixed

terminals of a mechanical potentiometer (RHx and RLx

inputs - where x = 1,2).

At both ends of each array and between each resistor seg-

ment there is a CMOS switch connected to the wiper (Rwx)

output. Within each individual array, only one switch may

be turned on at any one time. These switches are con-

trolled by the Wiper Counter Register (WCR) (See Figure

6). The WCR is a volatile register.

On power-up of the X9521, wiper position data is automati-

cally loaded into the WCR from its associated Non Volatile

Memory (NVM) Register. The Table below shows the Initial

Values of the DCP WCR’s before the contents of the NVM

is loaded into the WCR.

ACK

returned?

Issue Slave Address

Byte (Read or Write)

Byte load completed

by issuing STOP.

Enter ACK Polling

Issue STOP

Issue START

YES

High Voltage Cycle

complete. Continue

command sequence?

Issue STOP

Continue normal

Read or Write

command sequence

PROCEED

YES

Figure 5.

Acknowledge Polling Sequence

DECODER

RESISTOR

ARRAY

RHx

FET

SWITCHES

RLx

RWx

WIPER

COUNTER

NON

MEMORY

VOLATILE

(WCR)

(NVM)

“WIPER”

Figure 6.

DCP Internal Structure

DCP

Initial Values Before Recall

R1 / 100 TAP

VL / TAP = 0

R2 / 256 TAP

VH / TAP = 255

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