TFP401APZP datasheet(7/32 Pages) TI1

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TFP401, TFP401A

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SLDS120G – MARCH 2000 – REVISED MAY 2016

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(1)

Digital inputs are labeled DI in I/O column of Terminal Functions table.

(2)

Digital outputs are labeled DO in I/O column of Terminal Functions table.

7.5 DC Digital I/O Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VIH

High-level digital input voltage(1)

DVDD

VIL

Low-level digital input voltage(1)

0.8

IOH

High-level output drive current(2)

ST = high, VOH = 2.4 V

ST = low, VOH = 2.4 V

IOL

Low-level output drive current(2)

ST = high, VOL = 0.8 V

ST = low, VOL = 0.8 V

IOZ

Hi-Z output leakage current

PD = low or PDO = low

–1

μA

(1)

Specified as dc characteristic with no overshoot or undershoot

(2)

Alternating 2-pixel black/2-pixel white pattern. ST = high, STAG = high, QE[23:0] and QO[23:0] CL = 10 pF.

(3)

Analog inputs are open circuit (transmitter is disconnected from TFP401/401A).

7.6 DC Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VID

Analog input differential voltage(1)

1200

VIC

Analog input common-mode voltage(1)

AVDD – 300

AVDD – 37

VI(OC)

Open-circuit analog input voltage

AVDD – 10

AVDD + 10

IDD(2PIX) Normal 2-pix/clock power supply current

(2)

ODCK = 82.5 MHz, 2-pix/clock

370

IPD

Power-down current (3)

PD = low

IPDO

Output drive power-down current(3)

PDO = low

(1)

Specified as ac parameter to include sensitivity to overshoot, undershoot and reflection.

(2)

By characterization

(3)

tbit is 1/10 the pixel time, tpix

(4)

tpix is the pixel time defined as the period of the RxC input clock. The period of ODCK is equal to tpix in 1-pixel/clock mode or 2tpix when

in 2-pixel/clock mode.

(5)

Measured differentially at 50% crossing using ODCK output clock as trigger

(6)

Rise and fall times measured as time between 20% and 80% of signal amplitude.

(7)

Data and control signals are QE[23:0], QO[23:0], DE, HSYNC, VSYNC. and CTL[3:1].

7.7 AC Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VID(2)

Differential input sensitivity(1)

150

1560

mVp-p

tps

Analog input intra-pair (+ to –) differential skew(2)

0.4

tbit

(3)

tccs

Analog input inter-pair or channel-to-channel

skew (2)

tpix

(4)

tijit

Worst-case differential input clock jitter tolerance(2)(5)

tf1

Fall time of data and control signals(6)(7)

ST = low, CL = 5 pF

2.4

ST = high, CL = 10 pF

1.9

tr1

Rise time of data and control signals(6)(7)

ST = low, CL = 5 pF

2.4

ST = high, CL = 10 pF

1.9

tr2

Rise time of ODCK clock(6)

ST = low, CL = 5 pF

2.4

ST = high, CL = 10 pF

1.9

tf2

Fall time of ODCK clock(6)

ST = low, CL = 5 pF

2.4

ST = high, CL = 10 pF

1.9

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