LPC83X datasheet(17/78 Pages) NXP

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LPC83x

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Product data sheet

Rev. 1.2 — 4 April 2018

17 of 78

NXP Semiconductors

LPC83x

32-bit ARM Cortex-M0+ microcontroller

8.11.1 Features

• Pin interrupts

– Up to eight pins can be selected from all digital pins as edge- or level-sensitive

interrupt requests. Each request creates a separate interrupt in the NVIC.

– Edge-sensitive interrupt pins can interrupt on rising or falling edges or both.

– Level-sensitive interrupt pins can be HIGH- or LOW-active.

– Pin interrupts can wake up the LPC83x from sleep mode, deep-sleep mode, and

power-down mode.

• Pin interrupt pattern match engine

– Up to eight pins can be selected from all digital pins to contribute to a boolean

expression. The boolean expression consists of specified levels and/or transitions

on various combinations of these pins.

– Each minterm (product term) comprising the specified boolean expression can

generate its own, dedicated interrupt request.

– Any occurrence of a pattern match can be also programmed to generate an RXEV

notification to the ARM CPU. The RXEV signal can be connected to a pin.

– The pattern match engine does not facilitate wake-up.

8.12 DMA controller

The DMA controller can access all memories and the USART, SPI, I2C, and ADC

peripherals using DMA requests or triggers. DMA transfers can also be triggered by

internal events like the ADC interrupts, the pin interrupts (PININT0 and PININT1), the

SCTimer DMA requests, and the DMA trigger outputs.

8.12.1 Features

• 18 channels with each channel connected to peripheral request inputs.

• DMA operations can be triggered by on-chip events or by two pin interrupts. Each

DMA channel can select one trigger input from 8 sources.

• Priority is user selectable for each channel.

• Continuous priority arbitration.

• Address cache with two entries.

• Efficient use of data bus.

• Supports single transfers up to 1,024 words.

• Address increment options allow packing and/or unpacking data.

8.12.2 DMA trigger input MUX (TRIGMUX)

Each DMA trigger is connected to a programmable multiplexer which connects the trigger

input to one of multiple trigger sources. Each multiplexer supports the same trigger

sources: the ADC sequence interrupts, the SCTimer/PWM DMA request lines, and pin

interrupts PININT0 and PININT1, and the outputs of the DMA triggers 0 and 1 for chaining

DMA triggers.

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