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LPC83X Datasheet(PDF) 46 Page - NXP Semiconductors |
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LPC83X Datasheet(HTML) 46 Page - NXP Semiconductors |
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46 / 78 page ![]() LPC83x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved. Product data sheet Rev. 1.2 — 4 April 2018 46 of 78 NXP Semiconductors LPC83x 32-bit ARM Cortex-M0+ microcontroller 11.7 Electrical pin characteristics ADC - 57 141 Digital controller only. Analog portion of the ADC disabled in the PDRUNCFG register. - 57 141 Combined analog and digital logic. ADC enabled in the PDRUNCFG register and LPWRMODE bit set to 1 in the ADC CTRL register (ADC in low-power mode). - 1990 2070 Combined analog and digital logic. ADC enabled in the PDRUNCFG register and LPWRMODE bit set to 0 in the ADC CTRL register (ADC powered). DMA - 324 793 CRC - 34 85 - Table 10. Power consumption for individual analog and digital blocks …continued Peripheral Typical supply current in μA Notes System clock frequency = n/a 12 MHz 30 MHz Conditions: VDD = 1.8 V; on pin PIO0_12. Conditions: VDD = 3.3 V; on pin PIO0_12. Fig 24. High-drive output: Typical HIGH-level output voltage VOH versus HIGH-level output current IOH |
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