LPC83X datasheet(7/78 Pages) NXP

7 / 78 page

LPC83x

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.2 — 4 April 2018

7 of 78

NXP Semiconductors

LPC83x

32-bit ARM Cortex-M0+ microcontroller

Movable function for the I2C, USART, SPI, and SCTimer/PWM pin functions can be

assigned through the switch matrix to any pin that is not power or ground in place of the

pin’s fixed functions.

The following exceptions apply:

Do not assign more than one output to any pin. However, more than one input can be

assigned to a pin. Once any function is assigned to a pin, the pin’s GPIO functionality is

disabled.

Pin PIO0_4 triggers a wake-up from Deep power-down mode. If the part must wake up

from Deep power-down mode via an external pin, do not assign any movable function to

this pin.

The JTAG functions TDO, TDI, TCK, TMS, and TRST are selected on pins PIO0_0 to

PIO0_4 by hardware when the part is in boundary scan mode.

Table 3.

Pin description

Symbol

Reset

state[1]

Type

Description

PIO0_0/

TDO

[2]

I; PU

PIO0_0 — General-purpose port 0 input/output 0.

In ISP mode, this is the U0_RXD pin.

In boundary scan mode: TDO (Test Data Out).

PIO0_1/

CLKIN/TDI

[2]

I; PU

PIO0_1 — General-purpose port 0 input/output 1.

In boundary scan mode: TDI (Test Data In).

CLKIN — External clock input.

SWDIO/PIO0_2/

TMS

[4]

I; PU

SWDIO — Serial Wire Debug I/O. SWDIO is enabled by default

on this pin. In boundary scan mode: TMS (Test Mode Select).

I/O

PIO0_2 — General-purpose port 0 input/output 2.

SWCLK/PIO0_3/

TCK

[4]

I; PU

SWCLK — Serial Wire Clock. SWCLK is enabled by default on

this pin.

In boundary scan mode: TCK (Test Clock).

PIO0_3 — General-purpose port 0 input/output 3.

PIO0_4/ADC_11/

TRSTN/WAKEUP

[3]

I; PU

PIO0_4 — General-purpose port 0 input/output 4.

In boundary scan mode: TRST (Test Reset).

In ISP mode, this pin is the U0_TXD pin.

This pin triggers a wake-up from Deep power-down mode. If the

part must wake up from Deep power-down mode via an external

pin, do not assign any movable function to this pin. This pin

should be pulled HIGH externally before entering Deep

power-down mode. A LOW-going pulse as short as 50 ns causes

the chip to exit Deep power-down mode and wakes up the part.

ADC_11 — ADC input 11.

LPC83X Datasheet(PDF) 7 Page - NXP Semiconductors

LPC83X Datasheet(HTML) 7 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78

Datasheet Download

Link URL