LPC83X datasheet(10/78 Pages) NXP

10 / 78 page

LPC83x

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Product data sheet

Rev. 1.2 — 4 April 2018

10 of 78

NXP Semiconductors

LPC83x

32-bit ARM Cortex-M0+ microcontroller

[6]

True open-drain pin. I2C-bus pins compliant with the I2C-bus specification for I2C standard mode, I2C Fast-mode, and I2C Fast-mode

Plus. Do not use this pad for high-speed applications such as SPI or USART. The pin requires an external pull-up to provide output

functionality. When power is switched off, this pin is floating and does not disturb the I2C lines. Open-drain configuration applies to all

functions on this pin.

[7]

See Figure 9 for the reset pad configuration. This pin includes a 20 ns glitch filter (active in all power modes). RESET functionality is not

available in Deep power-down mode. Use the WAKEUP pin to reset the chip and wake up from Deep power-down mode. An external

pull-up resistor is required on this pin for the Deep power-down mode.

[8]

5 V tolerant pin providing standard digital I/O functions with configurable modes, configurable hysteresis, and analog I/O for the system

oscillator. When configured for XTALIN and XTALOUT, the digital section of the pin is disabled, and the pin is not 5 V tolerant.

[9]

The WKTCLKIN function is enabled in the DPDCTRL register in the PMU.

[10] The digital part of this pin is 3 V tolerant pin due to special analog functionality. Pin provides standard digital I/O functions with

configurable modes, configurable hysteresis, and an analog input. When configured as an analog input, the digital section of the pin is

disabled.

[11] Thermal pad for HVQFN33.

Table 4.

Movable functions (assign to pins PIO0_0 to PIO0_28 through switch matrix)

Function name

Type

Description

U0_TXD

Transmitter output for USART0.

U0_RXD

Receiver input for USART0.

U0_RTS

Request To Send output for USART0.

U0_CTS

Clear To Send input for USART0.

U0_SCLK

I/O

Serial clock input/output for USART0 in synchronous mode.

SPI0_SCK

I/O

Serial clock for SPI0.

SPI0_MOSI

I/O

Master Out Slave In for SPI0.

SPI0_MISO

I/O

Master In Slave Out for SPI0.

SPI0_SSEL0

I/O

Slave select 0 for SPI0.

SPI0_SSEL1

I/O

Slave select 1 for SPI0.

SPI0_SSEL2

I/O

Slave select 2 for SPI0.

SPI0_SSEL3

I/O

Slave select 3 for SPI0.

SPI1_SCK

I/O

Serial clock for SPI1.

SPI1_MOSI

I/O

Master Out Slave In for SPI1.

SPI1_MISO

I/O

Master In Slave Out for SPI1.

SPI1_SSEL0

I/O

Slave select 0 for SPI1.

SPI1_SSEL1

I/O

Slave select 1 for SPI1.

SCT_PIN0

Pin input 0 to the SCT input multiplexer.

SCT_PIN1

Pin input 1 to the SCT input multiplexer.

SCT_PIN2

Pin input 2 to the SCT input multiplexer.

SCT_PIN3

Pin input 3 to the SCT input multiplexer.

SCT_OUT0

SCT Output 0.

SCT_OUT1

SCT Output 1.

SCT_OUT2

SCT Output 2.

SCT_OUT3

SCT Output 3.

SCT_OUT4

SCT Output 4.

SCT_OUT5

SCT Output 5.

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