DS2174 datasheet(22/24 Pages) MAXIM

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DS2174

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6.2 Data Interface

Figure 6-3. TRANSMIT INTERFACE TIMING

Table 6 -3. TRANSMIT DATA TIMING

°C to +70°C for DS2174Q; V

DD = 3.0V to 3.6V;

-40°C to +85°C for DS2174QN; VDD = 3.0V to 3.6V)

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

NOTES

TCLK Clock Period (Nibble/Byte

Mode)

tCYC

12.5

TCLK High Time (Nibble/Byte Mode)

tPWH

5.0

½ tCYC

TCLK Low Time (Nibble/Byte Mode)

tPWL

5.0

½ tCYC

TCLK Clock Period (Bit Mode)

tCYC

6.45

TCLK High Time (Bit Mode)

tPWH

2.0

½ tCYC

TCLK Low Time (Bit Mode)

tPWL

2.0

½ tCYC

TCLK_EN Setup Time Before TCLK

↑

tSU

2.5

TCLK_EN Hold Time After TCLK

↑

2.5

TCLKO Output Delay After TCLK

↑

tOD

6.0

TCLKO High Time (Nibble/Byte

Mode)

tPWH(1)

5.0

TCLKO High Time (Bit Mode)

tPWH(1)

2.0

TDAT Output Delay After TCLKO

↓

tOD(1)

5.0

1, 2

NOTES:

1) 20pF load.

2) TDAT follows falling edge of TCLKO if CR4.5 = 0, rising edge if CR4.5 = 1.

3) Guaranteed by design.

TCLK

TDAT

TCLKO

TCLK_EN

t CYC

t PWH

t PWL

t H

t SU

t PWH(1)

t OD

t OD(1)

GAPPED CLOCK

DATA OUT

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