ML9050 datasheet(3/71 Pages) OKI

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ML9050/9051

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PEDL9050-02

PIN DESCRIPTION

Function

Pin name

Number

of pins

Description

MPU

Interface

I/O

D0 to D7

This is an 8-bit bi-directional data bus that can be connected to an 8-bit

or 16-bit standard MPU data bus. When a serial interface is selected (P/S

= "L"):

D7: Serial data input pin (SI)

D6: Serial clock input pin (SCL)

In this case, D0 to D5 will be in the Hi-Z state. D0 to D7 will all be in the

Hi-Z state when the chip select is in the inactive state.

Normally, the lowest bit of the MPU address bus is connected and used

for distinguishing between data and commands.

A0 = "H": Indicates that D0 to D7 is display data.

A1 = "L": Indicates that D0 to D7 is control data.

RES

Initial setting is made by making RES = "L". The reset operation is made

during the active level of the RES signal.

CS1

CS2

These are the chip select signals. The Chip Select of the LSI becomes

active when CS1 is "L" and also CS2 is "H" and allows the input/output of

data or commands.

(E)

The active level of this signal is "L" when connected to an 80-series MPU.

This terminal is connected to the RD signal of the 80-series MPU, and the

data bus of the ML9050/9051 goes into the output state when this signal

is "L".

The active level of this signal is "H" when connected to a 68-series MPU.

This pin will be the Enable and clock input pin when connected to a 68-

series MPU.

(R/W)

The active level of this signal is "L" when connected to an 80-series MPU.

This terminal is connected to the WR signal of the 80-series MPU. The

data on the data bus is latched into the ML9052 at the rising edge of the

WR signal.

When connected to a 68-series MPU, this pin becomes the input pin for

the Read/Write control signal.

R/W = "H": Read, R/W = "L": Write

C86

This is the pin for selecting the MPU interface type.

C86 = "H": 68-Series MPU interface.

C86 = "L": 80-Series MPU interface.

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