ML9050 datasheet(9/71 Pages) OKI

9 / 71 page

¡ Semiconductor

ML9050/9051

9/71

PEDL9050-02

FUNCTIONAL DESCRIPTION

MPU Interface

• Selection of interface type

The ML9050/9051 carries out data transfer using either the 8-bit bi-directional data bus (D7 to

D0) or the serial data input line (SI). Either the 8-bit parallel data input or serial data input can

be selected as shown in Table 1 by setting the P/S pin to the "H" or the "L" level.

Table 1

CS1

CS2

C86

D5 to D0

H: Parallel input

L: Serial input

CS1

CS2

—

C86

—

SCL

D5 to D0

(HZ)

A hyphen (—) indicates that the pin can be tied to the "H" or the "L" level.

• Parallel interface

When the parallel interface is selected, (P/S = "H"), it is possible to connect this LSI directly to the

MPU bus of either an 80-series MPU or a 68-series MPU as shown in Table 2 depending on

whether the pin C86 is set to "H" or "L".

Table 2

CS1

CS2

D7 to D0

H: 68-Series MPU bus

L: 80-Series MPU bus

CS1

CS2

R/W

D7 to D0

The data bus signals are identified as shown in Table 3 below depending on the combination of

the signals A0, RD(E), and WR(R/W) of Table 2.

Table 3

Common 68-Series

80-Series

WRD

Display data read

Display data write

Status read

Control data write (command)

ML9050 Datasheet(PDF) 9 Page - OKI electronic componets

ML9050 Datasheet(HTML) 9 Page - OKI electronic componets

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71

Datasheet Download

Link URL