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TLV75801PDRVT Datasheet(PDF) 3 Page - Texas Instruments |
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TLV75801PDRVT Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 22 page ![]() GND OUT IN 3 1 2 NC 4 6 5 FB EN 3 TLV758P www.ti.com SBVS351 – APRIL 2018 Product Folder Links: TLV758P Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated 5 Pin Configuration and Functions DRV Package 6-Pin Adjustable WSON Top View Pin Functions PIN I/O DESCRIPTION NAME WSON EN 4 Input Enable pin. Drive EN greater than VHI to turn on the regulator. Drive EN less than VLO to put the LDO into shutdown mode. FB 2 — This pin is used as an input to the control loop error amplifier and is used to set the output voltage of the LDO. GND 3 — Ground pin IN 6 Input Input pin. A minimum of 0.22-µF capacitance is required from this pin to ground. OUT 1 Output Regulated output voltage pin. For best transient response, use a small 1-µF ceramic capacitor from this pin to ground; see the Input and Output Capacitor Selection section. NC 5 — Not connected. Thermal pad Pad — The thermal pad is electrically connected to the GND node. Connect to the GND plane for improved thermal performance. |
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