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TLV75801PDRVT Datasheet(PDF) 8 Page - Texas Instruments |
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TLV75801PDRVT Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 22 page ![]() 8 TLV758P SBVS351 – APRIL 2018 www.ti.com Product Folder Links: TLV758P Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Feature Description (continued) (1) All table conditions must be met. (2) The device is disabled when any condition is met. 7.3.3 Internal Foldback Current Limit The TLV758P has an internal current limit that protects the regulator during fault conditions. The current limit is a hybrid brick-wall scheme until the output voltage is less than 0.4 V × VOUT(NOM); when the voltage drops below 0.4 V x VOUT(NOM), a foldback current limit is implemented that scales back the current as the output voltage approaches GND. When the output is shorted, the LDO supplies a typical current of 350 mA. The output voltage is not regulated when the device is in current limit. When the device output is shorted, the PMOS pass transistor dissipates power [(VIN – VOUT) × ISC] until thermal shutdown is triggered and the device turns off. After the device cools down, the internal thermal shutdown circuit turns the device back on. If the fault condition continues, the device cycles between current limit and thermal shutdown. The foldback current-limit circuit limits the current allowed through the device to current levels lower than the minimum current limit at the nominal VOUT current limit (ILIM) during startup. If the output is loaded by a constant- current load during startup, or if the output voltage is negative when the device is enabled, then the load current demanded by the load may exceed the foldback current limit and the device may not rise to the full output voltage. For constant-current loads, disable the output load until the TLV758P has fully risen to its nominal output voltage. The TLV758P PMOS pass element has an intrinsic body diode that conducts current when the voltage at the OUT pin exceeds the voltage at the IN pin. Do not force the output voltage to exceed the input voltage because excessively high current may flow through the body diode. 7.3.4 Thermal Shutdown Thermal shutdown protection disables the output when the junction temperature rises to approximately 170°C. Disabling the device eliminates the power dissipated by the device, allowing the device to cool. When the junction temperature cools to approximately 155°C, the output circuitry is again enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits regulator dissipation, protecting the LDO from damage as a result of overheating. Activating the thermal shutdown feature usually indicates excessive power dissipation as a result of the product of the (VIN – VOUT) voltage and the load current. For reliable operation, limit junction temperature to 125°C maximum. To estimate the margin of safety in a complete design, increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. The TLV758P internal protection circuitry protects against overload conditions but is not intended to be activated in normal operation. Continuously running the TLV758P into thermal shutdown degrades device reliability. 7.4 Device Functional Modes Table 1 lists a comparison between the normal, dropout, and disabled modes of operation. Table 1. Device Functional Modes Comparison OPERATING MODE PARAMETER VIN EN IOUT TJ Normal(1) VIN > VOUT(NOM) + VDO VEN > VHI IOUT < ICL TJ < TSD Dropout(1) VIN < VOUT(NOM) + VDO VEN > VHI — TJ < TSD Disabled(2) VIN < VUVLO VEN < VLO — TJ > TSD |
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