LTC2480CDD datasheet(31/40 Pages) LINER

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LTC2480

2480f

external oscillator), the LTC2480 output data rate can be

increased as desired. The duration of the conversion

phase is 41036/fEOSC. If fEOSC = 307.2kHz, the converter

behaves as if the internal oscillator is used and the notch

is set at 60Hz.

An increase in fEOSC over the nominal 307.2kHz will

translate into a proportional increase in the maximum

output data rate. The increase in output rate is neverthe-

less accompanied by three potential effects, which must

be carefully considered.

First, a change in fEOSC will result in a proportional change

in the internal notch position and in a reduction of the

converter differential mode rejection at the power line

frequency. In many applications, the subsequent perfor-

mance degradation can be substantially reduced by rely-

ing upon the LTC2480’s exceptional common mode rejec-

tion and by carefully eliminating common mode to differ-

ential mode conversion sources in the input circuit. The

user should avoid single-ended input filters and should

maintain a very high degree of matching and symmetry in

the circuits driving the IN+ and IN– pins.

Second, the increase in clock frequency will increase

proportionally the amount of sampling charge transferred

through the input and the reference pins. If large external

input and/or reference capacitors (CIN, CREF) are used, the

previous section provides formulae for evaluating the

effect of the source resistance upon the converter perfor-

mance for any value of fEOSC. If small external input and/or

reference capacitors (CIN, CREF) are used, the effect of the

external source resistance upon the LTC2480 typical

performance can be inferred from Figures 13, 14, 15 and

16 in which the horizontal axis is scaled by 307200/fEOSC.

Third, an increase in the frequency of the external oscilla-

tor above 1MHz (a more than 3

×increaseintheoutputdata

rate) will start to decrease the effectiveness of the internal

autocalibration circuits. This will result in a progressive

degradation in the converter accuracy and linearity. Typi-

cal measured performance curves for output data rates up

to 100 readings per second are shown in Figures 20 to 27.

In order to obtain the highest possible level of accuracy from

this converter at output data rates above 20 readings per

second, the user is advised to maximize the power supply

voltage used and to limit the maximum ambient operating

APPLICATIO S I FOR ATIO

Figure 20. Offset Error vs Output Data Rate and Temperature

Figure 21. +FS Error vs Output Data Rate and Temperature

Figure 22. –FS Error vs Output Data Rate and Temperature

OUTPUT DATA RATE (READINGS/SEC)

–10

2480 F20

100

030

VIN(CM) = VREF(CM)

VCC = VREF = 5V

VIN = 0V

FO = EXT CLOCK

TA = 85°C

TA = 25°C

OUTPUT DATA RATE (READINGS/SEC)

500

1500

2000

2500

3500

2480 F21

1000

3000

90 100

20 30

VIN(CM) = VREF(CM)

VCC = VREF = 5V

FO = EXT CLOCK

TA = 85°C

TA = 25°C

OUTPUT DATA RATE (READINGS/SEC)

–3500

–3000

–2000

–1500

–1000

2480 F22

–2500

–500

90 100

20 30

VIN(CM) = VREF(CM)

VCC = VREF = 5V

FO = EXT CLOCK

TA = 85°C

TA = 25°C

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