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UP1965S Datasheet(PDF) 4 Page - uPI Group Inc.

Part # UP1965S
Description  Synchronous-Rectified Buck Converter
PDF  11 Pages
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Manufacturer  UPI [uPI Group Inc.]
Direct Link  http://www.ubiq-semi.com/
Logo UPI - uPI Group Inc.

UP1965S Datasheet(HTML) 4 Page - uPI Group Inc.

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uP1965S
4
uP1965S-DS-F0000, May. 2018
www.upi-semi.com
Functional Description
Enable Control
The EN pin controls PWM pin state and the MOSFET gate
driver output state. Logic input low to EN pin disables the
gate drivers. Both UGATE and LGATE will be kept low, and
PWM pin will be in high input impedance state. Logic input
high to EN pin enables the gate drivers after a delay time
T
PDHDEN as shown in Figure 1. During this time period the
PWM pin stays at high input impedance state, both UGATE
and LGATE outputs are kept low, and the internal control
circuit does not respond to the PWM input voltage. After
T
PDHDEN expires, both UGATE and LGATE begin to respond
to the PWM input. This mechanism is specifically designed
for uPI’s PWM controller, which uses its PWM pin as a
multi-functional pin.
PWM
LGATE
UGATE
EN
TPDHDEN
Figure 1. Enable Control, EN
PWM Input
The PWM pin is a tri-state input. Logic high turns on the
high-side gate driver and turns off the low-side gate driver
once the POR of VCC is granted and EN is kept high.
Logic low turns off the high-side gate driver and turns on
the low-side gate driver. High impedance input at PWM pin
will keep both high-side and low-side gate drivers low and
turns off both MOSFETs. The PWM pin voltage is kept
around 1.6V by internal bias circuit when floating.
Refer to Figure 1, during T
PDHDEN, both UGATE and LGATE
are kept low, the PWM pin is in high-input impedance state,
and the PWM input will be ignored. For the PWM controller
uses its PWM pin as a multi-functional pin, a resistor will
be connected from PWM pin to GND to set parameter.
Note that this resistor must be greater than 15kΩ. Lower
resistor value will cause incorrect PWM voltage level at
the PWM pin when the PWM controller output is in tri-
state (high-impedance state).
Low-Side Driver
The low-side driver is designed to drive a ground referenced
N-channel MOSFET. The bias to the low-side driver is
internally connected to VCC supply and GND. The low-
side driver output is out of phase with the PWM input when
it is enabled. The low side driver is held low if the EN pin is
pulled low or high-impedance at PWM pin.
High-Side Driver
The high-side driver is designed to drive a floating N-channel
MOSFET. The bias voltage to the high-side driver is
internally connected to BOOT and PHASE pins. An
integrated bootstrap switch that is connected between
BOOT and VCC pins provides the bias current for the high
side gate driver.
The bootstrap capacitor C
BOOT is charged to VCC when
PHASE pin is grounded by turning on the low-side
MOSFET. The PHASE rises to V
IN when the high-side
MOSFET is turned on, forcing the BOOT pin voltage to V
IN
+ V
CC that provides voltage to hold the high-side MOSFET
on.
The high-side gate driver output is in phase with the PWM
input when it is enabled. The high-side driver is held low if
the EN pin is pulled low or high-impedance at PWM pin.
Shoot Through Protection
The shoot-through circuit prevents the high-side and low-
side MOSFETs from being turned on simultaneously and
conducting destructive large current. It is done by turning
on one MOSFET only after the other MOSFET is off already
with adequate delay time.
At the high-side off edge, UGATE and PHASE voltages
are monitored for anti-shoot-through protection. The low-
side driver will not begin to output high until both (V
UGATE -
V
PHASE) and VPHASE are lower than 1.2V, making sure the
high-side MOSFET is turned off completely.
At the low-side off edge, LGATE voltage is monitored for
anti-shoot-through protection. The high-side driver will not
begin to output high until V
LGATE is lower than 1.2V, making
sure the low-side MOSFET is turned off completely.



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