42
Am79Q02/021/031 Data Sheet
Master Clock Frequency
CSEL = 0000
1.536 MHz
CSEL = 0001
1.544 MHz
CSEL = 0010
2.048 MHz
CSEL = 0011
Reserved
CSEL = 01xx
Two times frequency specified above (2 x 1.536 MHz,
2 x 1.544 MHz, or 2 x 2.048 MHz)
CSEL = 10xx
Four times frequency specified above (4 x 1.536 MHz,
4 x 1.544 MHz, or 4 x 2.048 MHz)
CSEL = 11xx
Reserved
CSEL = 1010*
8.192 MHz is the default
These commands do not depend on the state of the Channel Enable Register.
* Power Up and Hardware Reset (RST) Value = 9Ah.
14, 15. Write/Read Channel Enable and Operating Mode Register
MPI Command
(4A/4B)
R/W = 0: Write
R/W = 1: Read
RSVD
Reserved for future use. Always write as 0, but 0 is not guaranteed when read.
Robbed-bit Mode
RBE = 0*
Robbed-bit Signaling mode is disabled.
RBE = 1
Robbed-bit Signaling mode is enabled on PCM receiver if
µ-law is
selected.
VOUT Mode
VMODE = 0*
VOUT = VREF through a resistor when channel is deactivated
VMODE = 1
VOUT high impedance when channel is deactivated.
Low Power Mode
LPM = 0*
Low Power mode off
LPM = 1
Low Power mode on while all channels are inactive
Channel Enable 4
EC4 = 0
Disabled, Channel 4 cannot receive commands
EC4 = 1*
Enabled, Channel 4 can receive commands
Channel Enable 3
EC3 = 0
Disabled, Channel 3 cannot receive commands
EC3 = 1*
Enabled, Channel 3 can receive commands
Channel Enable 2
EC2 = 0
Disabled, Channel 2 cannot receive commands
EC2 = 1*
Enabled, Channel 2 can receive commands
Channel Enable 1
EC1 = 0
Disabled, Channel 1 cannot receive commands
EC1 = 1*
Enabled, Channel 1 can receive commands
* Power Up and Hardware Reset (RST) Value = 0Fh.
D7
D6
D5
D4
D3
D2
D1
D0
Command
0
1
0
0
1
0
1
R/W
I/O Data
RSVD
RBE
VMODE
LPM
EC4
EC3
EC2
EC1
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