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FC8130 Datasheet(PDF) 8 Page - First Silicon Co., Ltd |
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FC8130 Datasheet(HTML) 8 Page - First Silicon Co., Ltd |
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8 / 16 page ![]() 2015. 4. 23 8/16 Revision No : 0 FC8130 IEN EN Input Bias Current EN=GND or VIN 0.1 1 µA Note 1: Absolute Maximum ratings indicate limits beyond which damage may occur. Electrical specifications do not apply when operating the device outside of its rated operating conditions. Note 2: All voltages are with respect to the potential at the ground pin. Note 3: θJA is measured in the natural convection at TA=25℃ on a high effective thermal conductivity test board (2 layers, 2S0P). Note 4: θJC represents the resistance to the heat flows the chip to package top case Note 5: Dropout voltage is measured by reducing VIN until VOUT drops 100mV from its nominal value at V N -VOUT = 1V. Note 6: Maximum Power dissipation for the device is calculated using the following equations: JA θ A T - J(MAX) T D P = Where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction -to-ambient thermal resistance. E.g. for the SOT-23-5 packageθJA = 152°C/W, TJ (MAX) = 150°C and using TA= 25°C, the maximum power dissipation is found to be 0.82W. The derating factor (-1/θJA) = -6.6mW/°C, thus below 25°C the power dissipation figure can be increased by 6.6mW per degree, and similarity decreased by this factor for temperatures above 25°C. Note 7: Typical values represent the most likely parametric norm. |
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