TFP513

TI PanelBus DIGITAL TRANSMITTER

SLLS611 − AUGUST 2004

23

POST OFFICE BOX 655303

Start Condition (S)

Stop Condition (P)

SDA

SCL

The basic access write cycle consists of the following:

1.

A start condition

2.

A slave address cycle

3.

A subaddress cycle

4.

Any number of data cycles

5.

A stop condition

The basic access read cycle consists of the following:

1.

A start condition

2.

A slave write address cycle

3.

A subaddress cycle

4.

A restart condition

5.

A slave read address cycle

6.

Any number of data cycles

7.

A stop condition

The start and stop conditions are shown in Figure 10. The high-to-low transition of SDA while SCL is high defines

the start condition. The low-to-high transition of SDA while SCL is high defines the stop condition. Each cycle,

data or address, consists of 8 bits of serial data followed by one acknowledge bit generated by the receiving

device. Thus, each data/address cycle contains 9 bits as shown in Figure 11.

SCL

1

2

3

4

5

6

7

8

9

SDA

1

2

3

4

5

6

7

8

9

2

3

4

5

6

7

1

Slave Address

Subaddress

Data

Stop

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