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DP8418 Datasheet(PDF) 20 Page - National Semiconductor (TI) |
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DP8418 Datasheet(HTML) 20 Page - National Semiconductor (TI) |
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20 / 28 page ![]() Switching Characteristics All AC parameters are specified with the equivalent load capacitances including traces of 88 DRAMs organized as 4 banks of 22 DRAMs each Maximums are based on worst- case conditions including all outputs switching simulta- neously This in many cases results in the AC values shown in the DP84XX DRAM controller data sheet being much looser than true worst case (maximum) AC delays The system designer should estimate the DP8419 load in hisher application and modify the appropriate AC parame- ters using the graph in Figure 10 Two example calculations are provided below TLF8396 – 22 FIGURE 10 Change in Propagation Delay Relative to ‘‘True’’ (Application) Load Minus AC Specified Data Sheet Load 2 Examples 1) A mode 4 user driving 2 16-bit banks of DRAM has the following approximate ‘‘true’’ loading conditions CAS - 300 pF Q0-Q8 - 250 pF RAS - 150 pF max tRPDL e 20 ns b 0ns e 20 ns (since RAS load- ing is the same as that which is spec’ed) max tCPDL e 32 ns b 7ns e 25 ns max tCCAS e 46 ns b 7ns e 39 ns max tRCC e 41 ns b 6ns e 35 ns min tRHA is not significantly effected since it does not involve an output transition Other parameters are adjusted in a similar manner 2) A mode 5 user driving one 16-bit bank of DRAM has the following approximate ‘‘true’’ loading conditions CAS - 120 pF Q0-Q8 - 100 pF RAS - 120 pF A C parameters should be adjusted as follows with RAHS e ‘‘1’’ max tRICL e 70 ns b 11 ns e 59 ns max tRCDL e 55 ns a 1ns b 11 ns e 45 ns (the a 1 ns is due to lighter RAS loading the b 11 ns is due to lighter CAS loading) min tRAH e 15 ns a 1ns e 16 ns The additional 1 ns is due to the fact that the RAS line is driving less (switching faster) than the load to which the 15 ns spec applies The row address will remain valid for about the same time irregardless of address loading since it is considered to be not valid at the beginning of its transition TLF8396 – 23 FIGURE 11a Output Load Circuit TLF8396 – 34 FIGURE 11b DP8417 TRI-STATE Waveforms Absolute Maximum Ratings (Note 1) If MilitaryAerospace specified devices are required please contact the National Semiconductor Sales OfficeDistributors for availability and specifications Supply voltage VCC 70V Storage Temperature Range b 65 Cto a150 C Input Voltage 55V Output Current 150 mA Lead Temp (Soldering 10 seconds) 300 C Operating Conditions Min Max Units VCC Supply Voltage 450 550 V TA Ambient Temperature 0 a 70 C 20 |
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