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ML9352 Datasheet(PDF) 49 Page - OKI electronic componets |
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ML9352 Datasheet(HTML) 49 Page - OKI electronic componets |
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49 / 53 page ![]() PEDL9352-01 OKI Semiconductor ML9352 49/53 (VDDA = VDDL = 2.7 to 4.5 V, VSSA = VSSL = 0 V, Tjop = –40 to +125°C) Parameter Symbol Condition Min. Max. Unit Serial clock period SCL “H” pulse width SCL “L” pulse width tSCYC tSHW tSLW 250 100 100 — — — Address setup time Address hold time tSAS tSAH 150 150 — — Data setup time Data hold time tSDS tSDH 100 100 — — CS–SCL Time tCSS tCSH 150 150 — — ns Note 1: The input signal rise and fall times are specified as 15 ns or less. Note 2: All timings are specified taking the levels of 20% and 80% of VDD as the reference. |
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