TLE8110ED datasheet(25/74 Pages) INFINEON

25 / 74 page

Data Sheet

Rev. 1.0

2018-03-07

TLE8110ED

Smart Multichannel Low Side Switch with Parallel Control and SPI Interface

Power Outputs

Figure 15

Timing of Output Channel switching (resistive load)

7.4

Parallel Connection of the Power Stages

The TLE8110ED is equipped with a structure which improves the capability of parallel-connected channels.

The device can be “informed” via the PMx.PMx - bits (see chapter “Control of the device”) which of the

channels are connected in parallel. The input channels can be mapped to the parallel connected output

channels in order to apply the PWM signals. This feature allows a flexible adaptation to different load

situations within the same hardware setup.

In case of overload the ground current and the power dissipation is increasing. The application has to take into

account that all maximum ratings are observed (e.g. operating temperature TJ and total ground current IGND,

see Maximum Ratings). In case of parallel connection of channels with or w/o PM-bit set, the defined

maximum clamping energy must not be exceeded.

All stages are switched on and off simultaneously. The µC has to ensure that the stages which are connected

in parallel have always the same state (on or off). The PM-bit should be set according to the parallel connected

power stages in order to achieve the best possible performance.

The PM-bit is set to its default value in case of a Reset event (Reset pin Low or at Digital Supply undervoltage),

that means the improved Parallel Mode is no longer active. In the event of reset the channels will be switched

off causing the clamping energy to be dissipated with low performance of the current sharing as without PM-

bit set, for more details please refer to the Application Note Switching Inductive Loads - TLE8110 addendum.

The performance during parallel connection of channels is specified by design and not subject to the

production test. All channels at the same junction temperature level.

ON-Resistance

The typical ON-Resistance RDSsum(typ) of parallel connected channels is given by:

(7.2)

Timing_Power_Outx _res1.vsd

VINx

VOUTx

VINh

VINl

VBATT

dON

tdOFF

80%

20%

RDSsum typ

()

RDSon n typ

()

-----------------------------

RDSon n 1 typ

()

-------------------------------------

–

TLE8110ED Datasheet(PDF) 25 Page - Infineon Technologies AG

TLE8110ED Datasheet(HTML) 25 Page - Infineon Technologies AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

Datasheet Download

Link URL