VSC7440 datasheet(365/444 Pages) MICROSEMI

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VCore-III System and CPU Interfaces

VMDS-10492 VSC7440 Datasheet Revision 4.2

348

The two-wire serial interface controller is compatible with the industry standard two-wire serial interface

protocol. The controller supports standard speed up to 100 kbps and fast speed up to 400 kbps. Multiple

bus masters, as well as both 7-bit and 10-bit addressing, are also supported.

The two-wire serial interface controller operates as master only.

The two-wire serial interface pins on the device are overlaid functions on the GPIO interface. Before

enabling the two-wire serial interface, the VCore-III CPU must enable overlaid functions for the

appropriate GPIO pins. For more information about overlaid functions on the GPIOs for these signals,

see GPIO Overlaid Functions, page 352.

The following table lists the pins of the two-wire serial interface.

TWI::SS_SCL_HCNT

Standard speed high time clock divider.

TWI::SS_SCL_LCNT

Standard speed low time clock divider.

TWI::FS_SCL_HCNT

Fast speed high time clock divider.

TWI::FS_SCL_LCNT

Fast speed low time clock divider.

TWI::INTR_STAT

Masked interrupt status.

TWI::INTR_MASK

Interrupt mask register.

TWI::RAW_INTR_STAT

Unmasked interrupt status.

TWI::RX_TL

Receive FIFO threshold for RX_FULL interrupt.

TWI::TX_TL

Transmit FIFO threshold for TX_EMPTY interrupt.

TWI::CLR_*

Individual CLR_* registers are used for clearing specific interrupts. See

TWI::CTRL

Control register.

TWI::STAT

Status register.

TWI::TXFLR

Current transmit FIFO level.

TWI::RXFLR

Current receive FIFO level.

TWI::TX_ABRT_SOURCE

Arbitration sources.

TWI::SDA_SETUP

Data delay clock divider.

TWI::ACK_GEN_CALL

Acknowledge of general call.

TWI::ENABLE_STATUS

General two-wire serial controller status.

ICPU_CFG::TWI_CONFIG

Configuration of TWI_SDA hold-delay.

ICPU_CFG::TWI_SPIKE_FILTER_CFG

Configuration of TWI_SDA spike filter.

Table 256 •

Two-Wire Serial Interface Pins

Pin Name

I/O

Description

TWI_SCL/GPIO

I/O

Two-wire serial interface clock, open-collector output.

TWI_SDA/GPIO

I/O

Two-wire serial interfacedata, open-collector output.

TWI_SCL_Mn/GPIO

I/O

Two-wire serial interface multiplexed clocks (12 instances in total), open-

collector outputs.

TWI_SCL_Mn_AD/GPIO

I/O

Two-wire serial interface multiplexed clocks (4 instances in total). Same as

TWI_SCL_Mn/GPIO but the pin is always driven meaning feedback from slave

devices is not possible.

TWI2_SCL/GPIO

I/O

Two-wire serial interface 2 clock, open-collector output.

Table 255 •

Two-Wire Serial Interface Registers (continued)

Description

VSC7440 Datasheet(PDF) 365 Page - Microsemi Corporation

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