EM78P372KSS20 datasheet(62/118 Pages) EMC

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EM78P372K

8-bit Microcontroller



Product Specification (V1.4) 05.11.2016

(This specification is subject to change without prior notice)

7.7.1.2

R9 (ADCON: ADC Control Register)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

VREFS

CKR1

CKR0

ADRUN

ADPD

ADIS2

ADIS1

ADIS0

The ADCON register controls the operation of the AD conversion and determines

which pin should be currently active.

Bit 7 (VREFS):The input source of the ADC Vref

0 : The Vref of the ADC is connected to internal reference voltage

(default value), and the

P54/TCC/VREF pin carries out the function of P54.

1 : The Vref of the ADC is connected to P54/TCC/VREF

NOTE

The P54/TCC/VREF pin cannot be applied to TCC and VREF at the same time. If

P54/TCC/VREF functions as VREF analog input pin, then CONT Bit 5 (TS) must be

“0”.

The P54/TCC/VREF pin priority is as follows:

Bit 6 ~ Bit 5 (CKR1 ~ CKR0): The prescaler of ADC oscillator clock rate

CPUS

CKR1 :

CKR0

Operation

Mode

Max. Operation Freq.

( if TAD=4us, match

372N )

Max. Operation Freq.

( if TAD=1us, match

372N )

(default)

FOSC/16

4 MHz

16 MHz

FOSC/4

1 MHz

4 MHz

FOSC/64

16 MHz

–

FOSC/1

–

1 MHz



–

16K/128kHz

Bit 4 (ADRUN): ADC starts to RUN

0: Reset upon completion of the conversion. This bit cannot be reset

though software.

1: AD conversion is started. This bit can be set by software.

Bit 3 (ADPD):

ADC Power-down mode

0: Switch off the resistor reference to conserve power even while the

CPU is operating

1: ADC is operating

P54/TCC/VREF Pin Priority

High

Medium

Low

VREF

TCC

P54

EM78P372KSS20 Datasheet(PDF) 62 Page - ELAN Microelectronics Corp

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