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MAS3504D Datasheet(PDF) 8 Page - Micronas |
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MAS3504D Datasheet(HTML) 8 Page - Micronas |
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8 / 40 page ![]() MAS 3504D 8 Micronas 2.5.4. Start-up Sequence The DC/DC converter starts from a minimum input voltage of 0.9 V. There should be no output load during startup. In case WSEN is active, the MAS 3504D is in the DSP operation mode. The start-up script should be as follows: 1. Enable the DC/DC-converter with a high signal (VDD, AVDD) at pin DCEN. 2. Wait until PUP goes “high”. 3. Wait one more millisecond to guarantee that the out- put voltage has settled (recommended). 4. Enable the MAS 3504D with a “high” signal at pin “WSEN”. Please also refer to Figure 2–2. 2.6. Interfaces The MAS 3504D uses an I2C control interface, a paral- lel I/O interface (PIO) for G.729- or ADPCM-data, a digital audio input interface (SDI) for audio data input and a digital audio output interface (SDO) for the decoded audio data (I2S or similar). The G.729 bit stream generated by an encoder is aligned in frames of 10 bytes. The parallel data required from the G.729 decoder must be sent in byte- swapped order related to the standard specification. The G.729 encoder also sends the encoded bit stream byte-swapped to the PIO interface. 2.6.1. Parallel Input Output Interface (PIO) The parallel interface of the MAS 3504D consists of the lines PI0...PI4, PI8, PI12...PI19, and several con- trol lines. Fig. 2–2: DC/DC startup 2.6.2. Parallel Data Output In encoding mode, PIO lines PI12...PI19 are switched to the MAS 3504D data output which hence will be an 8-bit parallel output port with MSB first (at position PI19) for the G.729 bit stream data. The data is transferred in bursts of 10 bytes (1 frame) each 10 ms. If the transmission of headers is enabled, there is an additional 10 byte burst before each sequence of 50 frames. Handshaking for PIO output mode is accomplished through the RTW, PCS, and PI12..PI19 signal lines (see Fig. 2–3). The PR line has to be set to high level. RTW will go low as soon as a byte is available in the output buffer and will stay low until a byte has been read. Reading of a byte is performed with a PCS pulse. Data is latched out from the MAS 3504D on the falling edge of PCS and removed from the bus on the rising edge of PCS. Fig. 2–3: Parallel Data Output (PIO) Timing >0.9 V WSEN > 2 V DCEN =1 DSP operation µController DC/DC On button RTW PIxx PCS t3 t0 t1 t2 t4 t5 |
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