A6986H datasheet(44/71 Pages) STMICROELECTRONICS

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Figure 43. Voltage supervisor operation

The comparator monitoring the FB voltage has four different programmable thresholds (80%, 87%, 93%, 96%

nominal output voltage) for high flexibility (see Section 7.3 MLF pin, Table 7. LNM/ LCM selection (A6986H3V3)

TJ = - 40 to 135 °C, VIN = 12 V unless otherwise specified., Table 8. LNM/ LCM selection (A6986H5V) TJ = -40 to

135 °C, VIN = 12 V unless otherwise specified., and Table 9. LNM/ LCM selection (A6986H) TJ = - 40 to 135 °C,

VIN = 12 V unless otherwise specified.).

When the RST comparator detects the output voltage is in regulation, a 2 mA internal current source starts to

charge an external capacitor to implement a voltage ramp on the DELAY pin. The RST open collector is then

released as soon as VDELAY = 1.234 V (see Figure 43. Voltage supervisor operation). The CDELAY is dimensioned

as follows:

CDELAY=ISSCH⋅TDELAY

VDELAY =2μA⋅TDELAY

1.234V

(41)

The maximum suggested capacitor value is 270 nF.

The A6986H also activates internal pull-down on RST pin in case overvoltage protection is triggered. As soon as

the output voltage goes below OVP threshold (20% typ.), the 2 µA internal current source starts to charge an

external capacitor to implement a voltage ramp on the DELAY pin. The RST open collector is then released as

soon as VDELAY = 1.234 V(see figure below).

A6986H

Voltage supervisor

DS12861 - Rev 3

page 44/71

A6986H Datasheet(PDF) 44 Page - STMicroelectronics