A6986H datasheet(48/71 Pages) STMICROELECTRONICS

48 / 71 page

The A6986H normally operates in the MASTER mode, driving the SYNCH line at the selected oscillator frequency

as shown in Figure 49. A6986H synchronization driving capability and Figure 46. Two regulators not

synchronized.

In the SLAVE mode the A6986H sets the internal oscillator at 250 kHz typ. (see Table 6. fSW selection TJ = - 40 to

135 °C, VIN= 12 V unless otherwise specified.) and drives the line accordingly.

Figure 49. A6986H synchronization driving capability

In order to safely guarantee that each regulator recognizes itself in SLAVE mode when synchronized, the external

master must drive the SYNCH pin with a clock signal frequency higher than the maximum oscillator spread of the

selected line in Table 6. fSW selection TJ = - 40 to 135 °C, VIN= 12 V unless otherwise specified.for at least 10

internal clock cycles.

Once recognized as SLAVE the synchronization range is:

•

275 - 1.4 MHz if fSW < 500 kHz

•

475 kHz - 2.2 MHz if fSW >=500 kHz

example 1: selecting RFSW = 0 Ω to VCC

Table 13. Example of oscillator frequency selection

Symbol

RVCC (E24 series) RGND (E24 series)

fSW min.

fSW typ.

fSW max.

fSW

0 Ω

225

250

275

the device enters in slave mode after 10 pulses at frequency higher than 275 kHz and so it is able to synchronize

to a clock signal in the range 275 kHz - 1.4 MHz (see Figure 48. Synchronization pulse definition).

Example 2: selecting RFSW = 0 Ω to GND

Table 14. Example of oscillator frequency selection (2)

Symbol

RVCC (E24 series) RGND (E24 series)

fSW min.

fSW typ.

fSW max.

fSW

0 Ω

450

500

550

A6986H

Synchronization (LNM)

DS12861 - Rev 3

page 48/71

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