AD7380 datasheet(22/29 Pages) AD

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AD4680/AD4681

Data Sheet

Rev. 0 | Page 22 of 29

Serial 2-Wire Mode

Configure 2-wire mode by setting the SDO bit to 0 in the

CONFIGURATION1 register. In 2-wire mode, the conversion

result for ADC A is output on the SDOA pin, and the conversion

result for ADC B is output on the SDOB/ALERT pin (see

Figure 40).

Serial 1-Wire Mode

In applications where slower throughput rates are allowed, the

serial interface can be configured to operate in 1-wire mode. In

1-wire mode, the conversion results from ADC A and ADC B

are output on the serial output, SDOA. Additional SCLK cycles

are required to propagate all data. The ADC A data is output

first, followed by the ADC B conversion results (see Figure 41).

LOW LATENCY READBACK

The interface on the AD4680/AD4681 has a one-cycle latency,

as shown in Figure 42. For applications that operate at lower

throughput rates, the latency of reading the conversion result

can be reduced. When the conversion time elapses, tCONVERT, a

second CS pulse after the initial CS pulse that initiates the

conversion, can be used to read back the conversion result. This

operation is shown in Figure 42.

SDI

SDOA

DON’T CARE

ADC A S0

ADC A S1

DON’T CARE

ADC B S0

ADC B S1

NOP

SDOB/ALERT

Figure 40. Reading Conversion Results for 2-Wire Mode

SDI

SDOA

DON’T CARE

ADC A S0 ADC B S0

ADC A S1 ADC B S1

NOP

Figure 41. Read Conversion Results for 1-Wire Mode

SCLK

TARGET SAMPLE PERIOD

INTERNAL

CNVn

DON’T CARE

CNVn+1

DON’T CARE

RESULTn+1

ACQ

RESULTn

SDOA

SDOB/ALERT

Figure 42. Low Throughput Low Latency

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