ATMEGA640 datasheet(218/436 Pages) MICROCHIP

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ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]

DS40002211A

22.10 Register Description

The following section describes the USART’s registers.

22.10.1

UDRn – USART I/O Data Register n

The USART Transmit Data Buffer Register and USART Receive Data Buffer Registers share the same I/O address

referred to as USART Data Register or UDRn. The Transmit Data Buffer Register (TXB) will be the destination for

data written to the UDRn Register location. Reading the UDRn Register location will return the contents of the

Receive Data Buffer Register (RXB).

For 5-bit, 6-bit, or 7-bit characters the upper unused bits will be ignored by the Transmitter and set to zero by the

Receiver.

The transmit buffer can only be written when the UDREn Flag in the UCSRnA Register is set. Data written to UDRn

when the UDREn Flag is not set, will be ignored by the USART Transmitter. When data is written to the transmit

buffer, and the Transmitter is enabled, the Transmitter will load the data into the Transmit Shift Register when the

Shift Register is empty. Then the data will be serially transmitted on the TxDn pin.

The receive buffer consists of a two level FIFO. The FIFO will change its state whenever the receive buffer is

accessed. Due to this behavior of the receive buffer, do not use Read-Modify-Write instructions (SBI and CBI) on

this location. Be careful when using bit test instructions (SBIC and SBIS), since these also will change the state of

the FIFO.

Bit

6543

210

RXB[7:0]

UDRn (Read)

TXB[7:0]

UDRn (Write)

Read/Write

R/W

Initial Value

0000

000

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