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ATMEGA640 Datasheet(PDF) 235 Page - Microchip Technology

Part # ATMEGA640
Description  8-bit Microcontroller with 16/32/64KB In-System Programmable Flash
PDF  436 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

ATMEGA640 Datasheet(HTML) 235 Page - Microchip Technology

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ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]
DS40002211A
23.6.4
UCSRnC – USART MSPIM Control and Status Register n C
• Bit 7:6 - UMSELn1:0: USART Mode Select
These bits select the mode of operation of the USART as shown in Table 23-3. See “UCSRnC – USART Control
and Status Register n C” on page 221 for full description of the normal USART operation. The MSPIM is enabled
when both UMSELn bits are set to one. The UDORDn, UCPHAn, and UCPOLn can be set in the same write oper-
ation where the MSPIM is enabled.
• Bit 5:3 - Reserved Bits in MSPI mode
When in MSPI mode, these bits are reserved for future use. For compatibility with future devices, these bits must
be written to zero when UCSRnC is written.
• Bit 2 - UDORDn: Data Order
When set to one the LSB of the data word is transmitted first. When set to zero the MSB of the data word is trans-
mitted first. Refer to “SPI Data Modes and Timing” on page 228 for details.
• Bit 1 - UCPHAn: Clock Phase
The UCPHAn bit setting determine if data is sampled on the leasing edge (first) or tailing (last) edge of XCKn.
Refer to “SPI Data Modes and Timing” on page 228 for details.
• Bit 0 - UCPOLn: Clock Polarity
The UCPOLn bit sets the polarity of the XCKn clock. The combination of the UCPOLn and UCPHAn bit settings
determine the timing of the data transfer. Refer to “SPI Data Modes and Timing” on page 228 for details.
23.6.5
UBRRnL and UBRRnH – USART MSPIM Baud Rate Registers
The function and bit description of the baud rate registers in MSPI mode is identical to normal USART operation.
See “UBRRnL and UBRRnH – USART Baud Rate Registers” on page 222.
Bit
76543210
UMSELn1
UMSELn0
-
-
-
UDORDn
UCPHAn
UCPOLn
UCSRnC
Read/Write
R/W
R/W
R
R
R
R/W
R/W
R/W
Initial Value
00000110
Table 23-3.
UMSELn Bits Settings
UMSELn1
UMSELn0
Mode
0
0
Asynchronous USART
0
1
Synchronous USART
1
0
(Reserved)
1
1
Master SPI (MSPIM)
Table 23-4.
Comparison of USART in MSPIM mode and SPI pins.
USART_MSPIM
SPI
Comment
TxDn
MOSI
Master Out only
RxDn
MISO
Master In only
XCKn
SCK
(Functionally identical)
(N/A)
SS
Not supported by USART in MSPIM



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