LTM4664 datasheet(20/132 Pages) AD

20 / 132 page

LTM4681

Rev. 0

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are: 350kHz operation; channel 2 at 0°; and channel 3 at

180°C (convention throughout this document: a phase

angle of 0° means the channel’s switch node rises coinci-

dent with the falling edge of the SYNC pulse). Connecting a

resistor divider from 2.5V to SGND (and using the factory-

default NVM setting of MFR_CONFIG_ALL[6] = 0b) allows

a convenient way to configure multiple LTM4681s with

identical NVM contents for different switching frequencies

of operation and phase interleaving angle settings of intra-

and extra-module-paralleled channels—all, without GUI

intervention or the need to custom pre-program module

NVM contents. (See the Applications Information sec-

tion.) Minimize capacitance—especially when the pin is

left open—to assure accurate detection of the pin state.

VOUT0_CFG (A8): Output Voltage Select Pin for VOUT0,

Coarse Setting. If the VOUT0_CFG and VTRIM0_CFG pins

are both left open—or, if the LTM4681 is configured to

ignore pin-strap (RCONFIG) resistors, i.e., MFR_CONFIG_

ALL[6] = 1b—then the LTM4681s target VOUT0 output

voltage setting (VOUT_COMMAND0) and associated

power-good and OV/UV warning and fault thresholds are

dictated at SVIN_01 power-up according to the LTM4681’s

NVM contents. A resistor divider connected to 2.5V and

to SGND (see Table 1)—in combination with resistor pin

settings on VTRIM0_CFG, and using the factory-default

NVM setting of MFR_CONFIG_ALL[6] = 0b—can be used

to configure the LTM4681’s channel 0 output to power-

up to a VOUT_COMMAND value (and associated output

voltage monitoring and protection/fault-detection thresh-

olds) different from those of NVM contents. (See the

Applications Information section.) Connecting resistor(s)

from VOUT0_CFG to SGND and/or VTRIM0_CFG to SGND

in this manner allows a convenient way to configure mul-

tiple LTM4681s with identical NVM contents for different

output voltage settings all without GUI intervention or

the need to custom-preprogram module NVM contents.

Minimize capacitance especially when the pin is left open

to assure accurate detection of the pin state. Note that use

of RCONFIGs on VOUT0_CFG/VTRIM0_CFG can affect the

VOUT0 range setting (MFR_PWM_MODE0[1]) and loop

gain. For addressed ASEL_01, Page 0x00 corresponds to

channel 0 and Page 0x01 corresponds to Channel 1. See

PAGE description section.

VTRIM0_CFG (D9): Output Voltage Select Pin for VOUT0,

Fine Setting. Works in combination with VOUT0_CFG to

affect the VOUT_COMMAND (and associated output volt-

age monitoring and protection/fault-detection thresholds)

of channel 0, at SVIN_01 power-up. (See VOUT0_CFG and

the Applications Information section.) A resistor divider

from 2.5V to SGND connected to the pin will set the

TRIM value. See Table 2. Minimize capacitance especially

when the pin is left open to assure accurate detection

of the pin state. Note that use of RCONFIGs on VOUT0_

CFG/VTRIM0_CFG can affect the VOUT0 range setting

(MFR_PWM_MODE0[1]) and loop gain. For addressed

ASEL_01, Page 0x00 corresponds to channel 0 and Page

0x01 corresponds to Channel 1. See PAGE command

description section.

VOUT1_CFG (B8): Output Voltage Select Pin for VOUT1,

Coarse Setting. If the VOUT1_CFG and VTRIM1_CFG pins

are both left open—or, if the LTM4681 is configured to

ignore pin-strap (RCONFIG) resistors, i.e., MFR_CONFIG_

ALL[6] = 1b—then the LTM4681s target VOUT1 output

voltage setting (VOUT_COMMAND1) and associated

power-good and OV/UV warning and fault thresholds are

dictated at SVIN_01 power-up according to the LTM4681’s

NVM contents. A resistor divider connected to 2.5V and

to SGND to this pin—in combination with resistor pin

settings on VTRIM1_CFG, and using the factory-default

NVM setting of MFR_CONFIG_ALL[6] = 0b—can be used

to configure the LTM4681’s channel 1 output to power-

up to a VOUT_COMMAND value (and associated output

voltage monitoring and protection/fault-detection thresh-

olds) different from those of NVM contents. (See the

Applications Information section.) Connecting resistor(s)

from VOUT1_CFG to SGND and/or VTRIM1_CFG to SGND

in this manner allows a convenient way to configure mul-

tiple LTM4681s with identical NVM contents for different

output voltage settings all without GUI intervention or

the need to custom-preprogram module NVM contents.

Minimize capacitance especially when the pin is left open

to assure accurate detection of the pin state. Note that use

of RCONFIGs on VOUT1_CFG/VTRIM1_CFG can affect the

VOUT1 range setting (MFR_PWM_MODE1[1]) and loop

gain. For addressed ASEL_01, Page 0x00 corresponds to

channel 0 and Page 0x01 corresponds to Channel 1. See

PAGE description section.

PIN FUNCTIONS

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