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LTM4680 Datasheet(PDF) 32 Page - Analog Devices

Part # LTM4680
Description  Quad 31.25A or Single 125A 關Module Regulator with Digital Power System Management
PDF  132 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM4680 Datasheet(HTML) 32 Page - Analog Devices

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LTM4681
32
Rev. 0
For more information www.analog.com
OPERATION
MFR_RESTART_DELAY can be used by the part. The maxi-
mum allowed value is 65.52 seconds.
VOLTAGE-BASED SEQUENCING
The sequence can also be voltage-based. As shown
in Figure 4, The PGOODn pin is asserted when the UV
threshold is exceeded for each output. It is possible to
feed the PGOODn pin from one LTM4681 channel into the
RUNn pin of the next LTM4681 channel in the sequence,
especially across multiple LTM4681s. The PGOODn has
a 100µs filter. If the VOUTn voltage bounces around the UV
threshold for a long period of time it is possible for the
PGOODn output to toggle more than once. To minimize
this problem, set the TON_RISE time under 100ms.
If a fault in the string of rails is detected, only the faulted
rail and downstream rails will fault off. The rails in the
string of devices in front of the faulted rail will remain on
unless commanded off.
or FAULT pulled low externally (if the MFR_FAULT_
RESPONSE is set to inhibit). Under these conditions, the
power stage is disabled in order to stop the transfer of
energy to the load as quickly as possible. The shutdown
state can be entered from the soft-start or active regula-
tion states or through user intervention.
There are two ways to respond to faults; which are retry
mode and latched off mode. In retry mode, the controller
responds to a fault by shutting down and entering the inac-
tive state for a programmable delay time (MFR_RETRY_
DELAY). This delay minimizes the duty cycle associated
with autonomous retries if the fault that causes the shut-
down disappears once the output is disabled. The retry
delay time is determined by the longer of the MFR_RETRY_
DELAY command or the time required for the regulated
output to decay below 12.5% of the programmed value.
If multiple outputs are controlled by the same FAULTn
pin, the decay time of the faulted output determines the
retry delay. If the natural decay time of the output is too
long, it is possible to remove the voltage requirement of
the MFR_RETRY_DELAY command by asserting bit 0
of MFR_CHAN_CONFIG. Alternatively, latched off mode
means the controller remains latched-off following a fault
and clearing requires user intervention such as toggling
RUNn or commanding the part OFF then ON.
LIGHT-LOAD CURRENT OPERATION
The LTM4681 has two modes of operation: high efficiency
discontinuous conduction mode or forced continuous
conduction mode. Mode selection is done using the
MFR_PWM _MODE command (discontinuous conduc-
tion is always the start-up mode, forced continuous is the
default running mode).
If a controller is enabled for discontinuous operation, the
inductor current is not allowed to reverse. The reverse
current comparator’s output turns off the bottom MOSFET
just before the inductor current reaches zero, preventing
it from reversing and going negative.
In forced continuous operation, the inductor current
is allowed to reverse at light loads or under large tran-
sient conditions. The peak inductor current is determined
solely by the voltage on the COMPn pins. In this mode,
Figure 4. Event (Voltage) Based Sequencing
LTM4681
1/2
RUN1
RUN0
PGOOD0
PGOOD1
PGOOD2
PGOOD3
START
LTM4681
1/2
4681 F04
RUN2
TO NEXT CHANNEL
IN THE SEQUENCE
RUN3
SHUTDOWN
The LTM4681 supports two shutdown modes. The first
mode is closed-loop shutdown response, with user
defined turn-off delay (TOFF_DELAY) and ramp down rate
(TOFF_FALL). The controller will maintain the mode of
operation for TOFF_FALL. The second mode is discontinu-
ous conduction mode, the controller will not draw current
from the load and the fall time will be set by the output
capacitance and load current, instead of TOFF_FALL.
The shutdown occurs in response to a fault condition or
loss of SHARE_CLK_nn (if bit 2 of MFR_CHAN_ CONFIG
is set to a 1) or VINnn falling below the VIN_OFF threshold



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