LTM4680 datasheet(65/132 Pages) AD

65 / 132 page

LTM4681

Rev. 0

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APPLICATIONS INFORMATION

it is driven quickly. If the ratio of CLOAD to COUT is greater

than 1:50, the switch rise time should be controlled so that

the load rise time is limited to approximately 25 • CLOAD.

Thus a 10µF capacitor would require a 250µs rise time,

limiting the charging current to about 200mA.

PolyPhase Configuration

When configuring a PolyPhase rail with multiple LTM4681s,

the user must share the SYNC, COMP, SHARE_CLK, FAULT,

and ALERT pins of these parts. Be sure to use pull-up resis-

tors on FAULT, SHARE_CLK and ALERT. One of the part’s

SYNC pins must be set to the desired switching frequency,

and all other FREQUENCY_SWITCH commands must be set

to External Clock. If an external oscillator is provided, set

the FREQUENCY_SWITCH command to External Clock for

all parts. The relative phasing of all the channels should be

spaced equally. The MFR_RAIL_ADDRESS of all the devices

should be set to the same value.

Multiple channels need to tie all the VSENSEn+ pins

together, and all the VSENSEn– pins together, COMPna and

COMPnb pins together as well. Do not assert bit[4] of

MFR_CONFIG_ALL except in a PolyPhase application. See

application example Figure 50.

CONNECTING THE USB TO I2C/SMBUS/PMBUS

CONTROLLER TO THE LTM4681 IN SYSTEM

The ADI USB-to-I2C/SMBus/PMBus adapter (DC1613A

or equivalent) can be interfaced to the LTM4681 on

the user’s board for programming, telemetry and sys-

tem debug. The adapter, when used in conjunction with

LTpowerPlay, provides a powerful way to debug an entire

power system. Faults are quickly diagnosed using telem-

etry, fault status commands and the fault log. The final

configuration can be quickly developed and stored to the

LTM4681 EEPROM. Figure 30 illustrates the application

schematic for powering, programming and communica-

tion with one or more LTM4681s via the ADI I2C/SMBus/

PMBus adapter regardless of whether or not system

power is present. If system power is not present, the

dongle will power the LTM4681 through the VDD33_nn

supply pin. To initialize the part when VINnn is not applied

and the VDD33_nn pin is powered, use global address 0x5B

command 0xBD data 0x2B followed by address 0x5B

command 0xBD data 0xC4. The LTM4681 can now com-

municate with the internal EEPROM and read the project

file. To write the updated project file to the NVM issue

a STORE_USER_ALL command. When VIN is applied, a

MFR_RESET must be issued to allow the PWM POWER

to be enabled and valid ADCs to be read.

VINnn

VIN

VDD33_nn

VDD25_nn

SDA_nn

1µF

VGS MAX ON THE TP0101K IS 8V IF VIN > 16V

CHANGE THE RESISTOR DIVIDER ON THE PFET GATE

LTM4681 HAS TWO INTERNAL CONTROLLERS

4681 F30

10k

100k

TP0101K

ISOLATED

3.3V

SDA

SCL

TP0101K

100k

LTC

CONTROLLER

HEADER

TO LTC DC1613

USB TO I2C/SMBus/PMBus

CONTROLLER

SCL_nn

WP_nn PGND/SGND_nn

LTM4681

1/2

VINnn

VDD33_nn

SDA_nn

SCL_nn

WP_nn PGND/SGND_nn

LTM4681

1/2

10k

VDD25

Figure 30. Controller Connection

LTM4680 Datasheet(PDF) 65 Page - Analog Devices

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