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VR5510 Datasheet(PDF) 96 Page - NXP Semiconductors |
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VR5510 Datasheet(HTML) 96 Page - NXP Semiconductors |
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96 / 203 page ![]() NXP Semiconductors VR5510 Multi-Output PMIC with SMPS and LDO 24 Register Mapping Address Register Main/FS Adr_5 Adr_4 Adr_3 Adr_2 Adr_1 Adr_0 R/W Read / Write M_FLAG 0 0 0 0 0 0 0 0 Read only M_MODE 0 0 0 0 0 0 1 0(W) /1(R) Read / Write M_SM_CTRL1 0 0 0 0 0 1 0 0(W) /1(R) Read / Write M_REG_CTRL1 0 0 0 0 0 1 1 0(W) /1(R) Write only M_REG_CTRL2 0 0 0 0 1 0 0 0(W) /1(R) Read / Write M_REG_CTRL3 0 0 0 0 1 0 1 0(W) /1(R) Read / Write M_TSD_CFG 0 0 0 0 1 1 0 0(W) /1(R) Read / Write M_AMUX 0 0 0 0 1 1 1 0(W) /1(R) Read / Write M_CLOCK1 0 0 0 1 0 0 0 0(W) /1(R) Read / Write M_CLOCK2 0 0 0 1 0 0 1 0(W) /1(R) Read / Write M_INT_MASK1 0 0 0 1 0 1 0 0(W) /1(R) Read / Write M_INT_MASK2 0 0 0 1 0 1 1 0(W) /1(R) Read / Write M_FLAG1 0 0 0 1 1 0 0 0(W) /1(R) Read / Write M_FLAG2 0 0 0 1 1 0 1 0(W) /1(R) Read / Write M_FLAG3 0 0 0 1 1 1 0 0(W) /1(R) Read / Write M_VMON_REGX 0 0 0 1 1 1 1 0(W) /1(R) Read / Write M_LVB1_SVS 0 0 1 0 0 0 0 0 Read only M_LVB1_STBY_DVS 0 0 1 0 0 0 1 0(W) /1(R) Read / Write M_MEMORY0 0 1 0 1 0 0 1 0(W) /1(R) Read / Write M_MEMORY1 0 1 0 1 0 1 0 0(W) /1(R) Read / Write M_DEVICEID 0 1 0 1 0 1 1 0 Read only FS_GRL_FLAGS 1 0 0 0 0 0 0 0 Read only Table 79. Register mapping VR5510 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 3 — 3 March 2021 96 / 203 |
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