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UPD301B Datasheet(PDF) 23 Page - Microchip Technology |
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UPD301B Datasheet(HTML) 23 Page - Microchip Technology |
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23 / 45 page ![]() 2020 Microchip Technology Inc. DS00003412A-page 23 UPD301B/C 4.3.6 DRP OFFLOAD DRP offload enables the device to manage the DRP toggle. This is beneficial as it allows the host CPU to remain in a low power state until a connection is detected. DRP offload toggles between Source and Sink advertisement by alternating between enabling Rp current sources and Rd pull-downs for a period of tDRP (DRP Time Register). The duty cycle between Source and Sink advertisement is determined by the DRP Duty Cycle Register. The DRP Time Register may be written by firmware or generated auto- matically via a pseudo random number generator. The latter approach should be used to reduce the probability of col- lisions when connecting. It is selectable whether the DRP cycle shall first advertise UFP or DFP. A connection is detected after a successful debounce for a period defined by the Match Debounce Register. VBUS is checked to be below vSafe0v for the DFP case. This results in IRQ_N assertion and automatic disablement of the DRP toggle. Firmware must further debounces for the period tPDDebounce before determining if a valid match is present. If a match has not occurred, firmware will enable DRP again. A pseudo random number generator, implemented via a LFSR, is utilized to generate the DRP period. The LFSR oper- ates off of the 20 KHz clock and updates every 100 us when enabled. Hardware limits the total DRP period to be between 50 ms and 100 ms in order to comply with the USB Type-C™ spec- ification. 4.3.7 COLLISION AVOIDANCE An alternative mode of operation is required to enable the CC detection circuit to facilitate software implementation of collision detection which was incorporated into version 3.0 of the USB PD Specification. In order to avoid message collisions due to asynchronous Messaging (AMS) sent from the Sink, the Source sets Rp to SinkTxOk (3A@5V) to indicate to the Sink that it is OK to initiate an AMS. When the Source wishes to initiate an AMS it sets Rp to SinkTxNG (1.5A@5V). When the Sink detects that Rp is set to SinkTxOk it may initiate an AMS. When the Sink detects that Rp is set to SinkTxNG it shall not initiate an AMS and shall only send Messages that are part of an AMS the Source has initiated. When operating as a Sink, a mechanism is required for quickly determining whether the Source is advertising SinkTxNG or SinkTxOK on Rp. A collision avoidance mechanism exists to enable software to instruct the device to sample only a single threshold on a single CC pin. This results in a cycle through both thresholds taking only 100 us, making it easier for software to meet the timing constraints mandated by SinkTxOk in the specification. 4.3.8 FAST ROLE SWAP (FRS) This feature is used to detect when a partner source has lost power. Upon detection of FRS signaling, the “Old Sink” transitions to be a Source and begins supplying VBUS. When operating as a Sink, the FRS mode of operation enables detection of FRS signaling. Detection results in IRQ_N assertion and this event may also be mapped as a PIO override source. When operating as a Source, upon detection of loss of power, the device will transmit FRS signaling. This is initiated by either assertion of a selected PIO or a CSR write. The following FRS related features are supported: • Ability to detect reception of FRS signaling • High bandwidth and current boost mode for CC comparator to increase sampling frequency • Interrupt, and PIO, assertion upon FRS detection • PIO override support for FRS detection as a source • Ability to initiate FRS signaling via GPIO assertion or register write. • Control 5 Ohm (Rsw) pull-down resistor |
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