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TMP114 Datasheet(PDF) 32 Page - Texas Instruments |
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TMP114 Datasheet(HTML) 32 Page - Texas Instruments |
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32 / 43 page ![]() Table 7-13. Slew_Limit Register Field Descriptions (continued) Bit Field Type Reset Description 14:2 Slew_Limit[13:0] R/W 0140h 13-bit temperature slew rate limit setting. Temperature low limit is represented by a 13-bit unsigned word with a LSB (Least Significant Bit) equal to 0.03125°C/s. The default setting for this is 10 °C/s. 1:0 Reserved R 0h These two bits will always read 0h 7.6.9 Unique_ID1 Register (Address = 08h) [reset = xxxxh] This register contains bits 47:32 of the Unique ID for the device. The Unique ID of the device is used for NIST traceability purposes. Return to Register Map. Figure 7-28. Unique_ID1 Register 15 14 13 12 11 10 9 8 Unique_ID[47:40] R-xxh 7 6 5 4 3 2 1 0 Unique_ID[39:32] R-xxh Table 7-14. Unique_ID Register Field Descriptions Bit Field Type Reset Description 15:0 Unique_ID[47:32] R xxxxh Bits 47:32 of the device Unique ID 7.6.10 Unique_ID2 Register (Address = 09h) [reset = xxxxh] This register contains bits 31:16 of the Unique ID for the device. Return to Register Map. Figure 7-29. Unique_ID2 Register 15 14 13 12 11 10 9 8 Unique_ID[31:24] R-xxh 7 6 5 4 3 2 1 0 Unique_ID[23:16] R-xxh Table 7-15. Unique_ID2 Register Field Descriptions Bit Field Type Reset Description 15:0 Unique_ID[31:16] R xxxxh Bits 31:16 of the device Unique ID TMP114 SNIS214 – JUNE 2021 www.ti.com 32 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMP114 |
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