TMP114 datasheet(23/43 Pages) TI

23 / 43 page

7.5.4.4 General Call Reset Function

The TMP114 responds to a two-wire, general-call address (0000 000) if the eighth bit is 0b. The device

acknowledges the general-call address and responds to commands in the second byte. If the second byte

is 0000b 0110b, the TMP114 internal registers are reset to power-up values as shown in Figure 7-18. The serial

address is unaffected by the general call reset.

START

Target Address

ACK from Target

Target controls SDA line

Controller controls SDA line

STOP

Reset Command

Figure 7-18. SMBus General Call Timing Diagram

7.5.4.5 Time-Out Function

The TMP114 resets the serial interface if the SCL line is held low by the controller or the SDA line is held low

by the TMP114 for 25 ms (typical) between a START and STOP condition. The TMP114 releases the SDA line

if the SCL pin is pulled low and waits for a START condition from the controller. To avoid activating the timeout

function, maintain a communication speed of at least 1 kHz for the SCL operating frequency. If another device on

the bus is holding the SDA pin low, the TMP114 will not reset.

7.5.4.6 I2C in I3C Mixed Fast Mode

A bus with both I3C and I2C interfaces is referred to as a mixed fast mode with clock speeds up to 12.5 MHz.

The TMP114 is an I2C device that can be on the same bus that has an I3C device attached if the TMP114 device

incorporates a spike suppression filter of 50 ns on the SDA and SCL pins to avoid any interference to the bus

when communicating with I3C devices.

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TMP114

SNIS214 – JUNE 2021

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TMP114 Datasheet(PDF) 23 Page - Texas Instruments