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ACE25AA320GFMTH Datasheet(PDF) 22 Page - ACE Technology Co., LTD. |
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ACE25AA320GFMTH Datasheet(HTML) 22 Page - ACE Technology Co., LTD. |
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22 / 67 page ![]() ACE25AA320G Serial NOR Flash Memory 3.0V Multi I/O with 4KB, 32KB & 64KB Sector/Block Erase VER 1.2 22 Fast Read (0BH) in QPI Mode The Fast Read command is also supported in QPI mode. In QPI mode, the number of dummy clocks is configured by the “Set Read Parameters (C0H)” command to accommodate a wide range application with different needs for either maximum Fast Read frequency or minimum data access latency. Depending on the Read Parameter Bits P[5:4] setting, the number of dummy clocks can be configured as either 4/6/8. When the dummy cycle is configured to 4, addr [0] input must be 0. Dual Output Fast Read (3BH ) The Dual Output Fast Read command is followed by 3-byte address (A23-A0) and a dummy byte, each bit being latched in during the rising edge of SCLK, then the memory contents are shifted out 2-bit per clock cycle from SI and SO. The command sequence is shown in Figure 8. The first byte addressed can be at any location. The address is automatically incremented to the next address after each byte of data is shifted out. Figure8. Dual Output Fast Read Sequence Diagram Figure7a. Read Data Bytes at Higher Speed Sequence Diagram (QPI) |
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