ACE25AA320GFMTH datasheet(11/67 Pages) ACE

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ACE25AA320G

Serial NOR Flash Memory

3.0V Multi I/O with 4KB, 32KB & 64KB Sector/Block Erase

VER 1.2

Commands Description

All commands, addresses and data are shifted in and out of the device, beginning with the most

significant bit on the first rising edge of SCLK after CS# is driven low. Then, the one-byte command code

must be shifted in to the device, most significant bit first on SI, each bit being latched on the rising edges

of SCLK.

See Table2, every command sequence starts with a one-byte command code. Depending on the

command, this might be followed by address bytes, or by data bytes, or by both or none. CS# must be

driven high after the last bit of the command sequence has been shifted in. For the command of Read,

Fast Read, Read Status Register, and Read Device ID, the shifted-in command sequence is followed by a

data-out sequence. CS# can be driven high after any bit of the data-out sequence is being shifted out.

For the command of Page Program, Sector Erase, Block Erase, Chip Erase, Write Status Register, Write

Enable, Write Disable, CS# must be driven high exactly at a byte boundary, otherwise the command is

rejected. That is CS# must driven high when the number of clock pulses after CS# being driven low is an

exact multiple of eight. For Page Program, if at any time the input byte is not a full byte, nothing will

happen and WEL will not be reset.

Table2. Commands

Command Name

Byte1

Byte2

Byte3

Byte4

Byte5

Byte6

n-Bytes

Write Enable

06H

Write Enable for

Volatile Status

50H

Write Disable

04H

Read Status

05H

(S7-S0)

(continuous)

Read Status

35H

(S15-S8)

(continuous)

Write Status

01H

(S7-S0)

(S15-S8)

(continuous)

Read Data

03H

A23-A16

A15-A8

A7-A0

(D7-D0)

(Next byte) (continuous)

Fast Read

0BH

A23-A16

A15-A8

A7-A0

dummy

(D7-D0)

(continuous)

Dual Output Fast

Read

3BH

A23-A16

A15-A8

A7-A0

dummy

(D7-D0)(1) (continuous)

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